SN65DP159: Dual Link DVI Support

Edin Vojnikovic

Part Number: SN65DP159

Can two DP159 be used to redrive Dual Link DVI? The clock and 6 diff pairs will be generated as TMDS on Xilinx Kintex7 devices. What will be the skew between OUT_D(0 to 2) from first DP159 and OUT_D0(3 to 5) from second DP159?

Any other recommendation to redrive Dual Link DVI.

over 6 years ago

0 Brian Zhou over 6 years ago

TI__Guru**** 153200 points

can you draw a block diagram?

0 Nasser Mohammadi over 6 years ago

TI__Guru* 93570 points

Hi Edin,
I believe main issue is part to part differential pair skew. I am not aware of any DP159 part to part skew characterization. Therefor this has to be done - perhaps using FPGA - external to the DP159 device.
Regards,,nasser

0 Edin Vojnikovic over 6 years ago in reply to Brian Zhou

Prodigy 20 points

Input is DP connector -> STDP4020 -> (2 links 24bit HV clock)-> Kintex7
In FPGA I have code to generate dual DVI)
Kintex 7 -> 6 diff pairs of data and one clock pair with TMDS I/O standard.
At this point I have good DVI-DL signal but I know TMDS buffers in Xilinx can't drive drive long cable.
I have to drive 5M cable to my Display.

One option could be TMDS422, but still looking how long cable I can drive.

On other designs I use DP159 but only for HDMI.

0 Brian Zhou over 6 years ago in reply to Edin Vojnikovic

TI__Guru**** 153200 points

what data rate of your system? you may try two DP159 as redrivers, but again we don't have data for part to part skew of this device.

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SN65DP159: Dual Link DVI Support