SN65DSI84-Q1: Register 0x0A

I.K. -san

Sorry for the late contact.
I am very grateful for your answers.

I have additional questions. There are multiple, sorry, but I would like confirmation.

- Does influence of external noise make the register value default?
- What is the condition for the register default?
- The picture was blacked out during the external noise test.
Do I need to reset the power to correct this phenomenon? If you have any other way, please let me know.

Best Regards,
Ishiwata

Hi Ishiwata-san,

It should be bit 0 of error register 0xE5 (PLL_UNLOCK) that they should monitor. In combination with PLL_EN, PLL_EN_STAT only tells you that the PLL is enabled. PLL_UNLOCK will tell you if the PLL is unlocked.

Also, what were the conditions of the external noise test? The datasheet specification requires less than 50mVpp supply noise on any Vcc pin. If they remove the noise and the picture doesn't return, they can try restarting and going through the initialization sequence again.

Regards,
I.K.

Hi I.K. -san

Sorry for the late reply.

Thank you for your communication.

I do not know the detailed conditions of the external noise test, but I think that the noise test is conducted with the standard close to IEC61000-4-2.

I have additional questions.

If external noise causes internal registers to be replaced or defaulted, do we need to start with 　" Table 2. Initialization Sequence " 's  Lint seq 1?

Or is it OK to start with Int seq 2?  If the internal registers are rewritten or defaulted, is it OK to start with Int seq 5?

Best Regards,

Ishiwata

Hi Ishiwata-san,

I believe it should be fine to start with Init seq 5 if it is only the registers that need to be configured again. They should disable the PLL first and then re-enable it in Init seq 6.

Regards,
I.K.