Hi team,
Which clock is Reg 0x4F FREQ_CNT_HIGH & 0x51 FREQ_CNT_LOW counting?
Is it pointing FPD3-PCLK of the following explanation?
In other words, if REFCLK is 25 MHz in synchronous mode, should Reg 0x4F be 100MHz?
I need to know what this register points to in order to verify that the customer's usage is correct.
Best regards,
Tomoaki Yoshida
