Part Number: SN65C1167
Hello team , my customer wants to implement below architecture based on the article http://www.ti.com/lit/an/slyt441/slyt441.pdf
The query is :
is the below use case fine for 4Mhz data rate of SPI
Also application note talks about using Two SPI to take care the delay but customer thinks his speed being low that might not be required .
Can you please look into the same .