Is the DS125MB203 cold sparing? I couldn’t see that in the datasheet.
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At least the outputs or combined I/O channels should be at high impedance when the device is powered off. This is most likely where the cold sparing capability will be needed. Another definition would include all the inputs as well. Another definition would include all the outputs, inputs, combined I/O, and control signals. Leakage current would depend on the technology of the device and how good the chip designer is at getting it as low as possible. I don’t believe there is any actual standard for maximum leakage current, other than it must have an insignificant effect on any device controlling the bus.