DP83867IR: RGMIICTL(0x0032) register

Yusuke Mukuno

Part Number: DP83867IR

DP83867IR datasheet says as below,

"Configuration of the Aligned mode or Shift mode is accomplished via the RGMII Control Register (RGMIICTL), address 0x0032.
In Shift mode, the clock skew can be adjusted using the RGMII Delay Control Register (RGMIIDCTL), address 0x0086."

The following my understanding is correct?

In Shift mode(RGMIICTL 0x0032[0:1) = 11b), the clock skew can be adjusted using the RGMIIDCTL(0x0086).

Also, In Aligned mode(RGMIICTL 0x0032[0:1] = 00b), the RGMIIDCTL(0x0086) registers are disabled.

My customer try to check with Aligned mode. They could be adjusted using the RGMIIDCTL.

If my understanding is correct, please let me know the reason.

Muk

over 6 years ago

0 Hung Nguyen92 over 6 years ago

TI__Expert 5670 points

Hi Yusuke,

In order to use RGMIIDCTL (0x0086), the Shift mode needs to be enabled in RGMIICTL 0x0032[1:0]

Regards,

Hung Nguyen

0 Yusuke Mukuno over 6 years ago in reply to Hung Nguyen92

TI__Expert 7395 points

Thanks, Nguyen-san

They tried to check with Aligned mode. They could be adjusted using the RGMIIDCTL.

They could adjust the delay time using RGMIIDCL with Aligned mode

Could you please give me your comment for the reason?

Thanks

Muk

0 Hung Nguyen92 over 6 years ago in reply to Yusuke Mukuno

TI__Expert 5670 points

Hi Muk,

The reason could be that the delay settings in RGMIIDCL (0x0086) is not gated by RGMIICTL 0x0032[1:0].

However, it is not recommended to use the delay time in Aligned mode.

Regards,

Hung Nguyen

0 Yusuke Mukuno over 6 years ago in reply to Hung Nguyen92

TI__Expert 7395 points

Hi Nguyen-san,

Are the following default values and setting correct?

Is it a mistake as red?

Customer read RGIICTL(0x0032) value after RESET_N. Results = 0xD3 (Bit[0:1]=11)

Waveform of RX_CLK and RX_D0 is below,

Customer write 0xD0(bit[1:0]=00) value to RGIICTL(0x0032)

Waveform of RX_CLK and RX_D0 is below,

Thanks

Muk

0 Hung Nguyen92 over 6 years ago in reply to Yusuke Mukuno

TI__Expert 5670 points

Hi Muk,

The description in datasheet is correct. However, the default values depend on the strap of RGMII Clock Skew RX[2:0] and RGMII Clock Skew TX[2:0]. Refer to section 8.5.1 in datasheet for more details.

Regards,

Hung Nguyen

0 Hung Nguyen92 over 6 years ago in reply to Hung Nguyen92

TI__Expert 5670 points

Hi Muk,

Have cleared the confusion over email communication.

I will go ahead and close this thread.

Regards,

Hung Nguyen

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DP83867IR: RGMIICTL(0x0032) register