TCA9555: Setting Check

Hey Julian,

"1.Is  each GPIO internal driving current 1.8V/100k = 10uA? (100k is internal pull-up resister)"

Your equation assumes the 1.8V is referenced to GND. Where (1.8V-GND)/100k = 10uA. If the ports are NC (no connect) then the pin is essentially 1.8V due to parasitic capacitance so the GPIO ideally is not drawing any current [(1.8V-1.8V)/100k=0uA]. The leakage current each pin draws is based on the CMOS structure where both CMOS structures have an impedance in the order of Megaohms.

"2. which is better  that if GPIO no use, floating or  all GPIO connect A 1M resister to GND or  each GPIO connect EACH 1M resister to GND?"

1M pull down generates a voltage divider with the 100k pull up so the GPIO will not be referenced to GND or Vcc but a voltage slightly above GND, this will result in more shoot through current between the CMOS input structure. A 1 M pull up will not help much at all because it is weaker than a 100k pull up resistor (internal). It is better to leak the GPIO floating.

"3.  Is INT connect a 10k to 1.8V is better than 1k, right?"

The question here is whether or not you expect a lot of capacitance on the INT line and if you need a fast rise time. If you are in a noisy environment then 1k would help keep the signal high but uses more power when INT is low. 10k on the INT should be fine, 1k gives faster rise times and a stronger pull up against noise but uses more power when INT is low. I'll let you decide what seems better to you knowing this.

"4. R544, R546, R549 and R552,  when GPIO =L is no problem. BUT when GPIO=H,  Is the voltage 1.8V*(4.7/(100+4.7))? (Maybe R544, R546, R549 and R552 NC is better)"

Your analysis here is incorrect, When the GPIO=H the voltage at the point you are interested is ~1.8V. Q1 in figure 23 is turned on.

section 7.5 tells me at 1.65Vcc, the VoH should be ATLEAST 1.2V.

Your equation is only correct if the GPIO = Hi-Z (set GPIO as an input).

Thanks,

-Bobby