DS110DF410: CDR Status Register REG 0x02

Kawai

Guru 19785 points

Part Number: DS110DF410

Hi Team,

We would like to know the detail about th register REG 0x02 [4:2].

I am understanding that when Bit [5:4] = 11'b, we can judge that CDR is locked.
To achieve lock, I believe Bit [3] is also required to be "1", which means enough number of bit transition had been met.

Customer is observing REG 0x02 = 0xD8 = 1101 1000. In this case, system successed to link-up.

REG 0x02 = 0xD8 shows CDR is locked, however, it shows there were not enough bit transition to acuire CDR lock.

Can this happen ? What would be the condition that this status output could occur ?

Best Regards,
Kawai

over 6 years ago

0 Nasser Mohammadi over 6 years ago

TI__Guru* 93570 points

Hi Kawai-San,

I tried to duplicate this.

When bits 4 & 3 are set, this means device is locked. As long as these two bits are set this means lock is achieved and device has passed lock qualifiers(for example SBT limit is reached) and we should be running error free.

Based on my finding in the lab, normally I see bits 4,3, and 2 set. I don't see a case where just bits 4 & 3 are set but not bit 2. Is it possible that customer may not be reading reg 0x02 fast enough to observe a lock failure?

What type of data pattern your customer is using? Do they see this with specific data patterns or all data patterns? Can they try PRBS10 data pattern?

Regards,,nasser

0 Kawai over 6 years ago in reply to Nasser Mohammadi

Guru 19785 points

Hi Nasser-san,

The issue is rarely observed and is difficult to be reproduced.

Would there be a possibility that the register read result of LSB or MSB is only updated ?

From the design point of view, which are the required bits in REG 0x02 to be set to have Bit [4:3] = 11'b, CDR locked ?

Best Regards,
Kawai

0 Nasser Mohammadi over 6 years ago in reply to Kawai

TI__Guru* 93570 points

Kawai-San,

SBT or bit 2 should be set or achieved before we can declare lock(i.e 0x02[4:3] = 1'b11).

Regards,,nasser

0 Kawai over 6 years ago in reply to Nasser Mohammadi

Guru 19785 points

Hi Nasser-san,

Other than bit [2], I believe, Bit [7] and Bit [6] must be set before CDR to achieve lock.

REG 0x02 = "1100 0100" (CDR Lock condition met), then, it should change to "1101 1100" (CDR Locked).

Am I understanding correctly ?

Best Regards,

Kawai

0 Nasser Mohammadi over 6 years ago in reply to Kawai

TI__Guru* 93570 points

Hi Kawai-San,

If we are setting any CTLE mode other than adapt mode 0, then both bits 7 & 6 would also be set. I believe your understanding is correct.

Regards,,nasser

0 Kawai over 6 years ago in reply to Nasser Mohammadi

Guru 19785 points

Hi Nasser-san,

I understood.

From the other post, if used in Adapt mode 0, manual CTLE mode, I believe bit 6 could be both "1" or "0" which should be ignored.

Best Regards,

Kawai

0 Nasser Mohammadi over 6 years ago in reply to Kawai

TI__Guru* 93570 points

Hi Kawai-San,

Your understanding is correct.

Regards,,nasser

0 Kawai over 6 years ago in reply to Nasser Mohammadi

Guru 19785 points

Hi Nasser-san,

Thank you so much for your support !!

Best Regards,
Kawai

Interface

Interface forum

DS110DF410: CDR Status Register REG 0x02