Hi Team
I have a question at DS90UB936-Q1.
Datasheet p.13 tDDLT Lock_Time is PLL Lock?
Is tDDLT a GPIO Lcok Time?
I want to know the time to PLL Lcok.
How long does the PLL lock?
Best Regards,
Ishiwata
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Hi Team
I have a question at DS90UB936-Q1.
Datasheet p.13 tDDLT Lock_Time is PLL Lock?
Is tDDLT a GPIO Lcok Time?
I want to know the time to PLL Lcok.
How long does the PLL lock?
Best Regards,
Ishiwata
Hello Ishiwata,
It may be unstable until the link is established as the AEQ algorithm attempts to find the input signal. It could also depend on how the PASS criteria is configured if the LOCK output is programmed to be a logical AND of lock and pass criteria.
Best Regards,
Casey