TL16C554A: use TL16C554A to extend 48 port UART

Hey Polly,

Just to be sure, are you going to be putting the serial communication side of the TL16C554A to the AM3354? Or are you going to use the parallel side of the TL16C554A to connect to the AM3354?

I assume it's the former, where you will be connecting between the two devices in parallel. If this is the case, we will need to look at how many GPIO's the device (AM3354) has available and which pins you need to access from the TL16C554A. D0-7, A0-A2, CSa-CSd, IOW, and IOR are all necessary pins you will need to use but you could also need to look at TXRDY/RXRDY and INTa-INTd. The mandatory pins up the GPIO count to 17. If you are using 12 of these devices then you will require atleast 204 GPIOs. So the question is if the AM3354 has 204 GPIOs available.

If this is correct, please let me know. I will change the thread assignment to the sitara group to confirm they have this many pins available.

Thanks,

-Bobby

Hi Bobby

I want to use the parallel side of the TL16C554A to connect to the AM3354.

All of the TL16C554A will use the same  D0-7, A0-A2 ,  IOW, and IOR.

And there is a FPGA chip to control CSa-CSd ,INTa~INTd.

Regards,

Ronald

Thanks for the clarity Ronald,

I've tagged the sitara team to this thread so they should be able to specify if the AM3354 can support this.

On the UART side. I calculate that each UART requires the AM3354 to support 8 GPIOs and 5 GPOs which give us a total of 60 GPOs and 96 GPIOs.

The Sitara datasheet specifies the device has a total of 4 banks for GPIOs and each bank contains 32 GPIOs meaning they have atleast 128 GPIOs available.

Please also note that the Sitara has it's own UART channels (up to 6).

Thanks,
-Bobby

Hey Biser,

Thanks for the additional comments.

"so probably external buffering will be required too"

I just want to check what you mean by this point, from my analog background buffering means to redrive the signal. Am I correct to assume, you mean buffering in the sense of memory? If so, our TL16C554A does have a 16 byte FIFO to hold data.

"The main question here is how will these external UARTs be driven using GPIOs"

An alternative approach would be to use an I2C I/O expanders (keypad scanner) to handle some of the UART device's I/O ports if bit banging the GPIOs is not supported. This of course would reduce the speed of communication because I2C would require multiple transactions to perform the GPIO bit banging. The advantage here is it would be possible for us to poll the UART data from parallel to serial through the I2C I/O expanders.

My thoughts here are it is possible but difficult to support the 12 UART devices using the Sitara.

-Bobby

Hi Bobby,Biser

Thanks for your reply.

There is a product which used AM3354+ 4*TL16C554A  in my company.

But performance is not good.

It seems like AM3354 + 12*TL16C554A  is not good choice.

So I will try to search another solution.

Regards,

Ronald