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DS90UB953-Q1: POC Trace

Laud Laudencia
Prodigy 200 points
Part Number: DS90UB953-Q1

I've designed a 953 system, and I have a few clarifications regarding the POC trace:

the trace from DOUT+/- pins are designed 100R differential pairs up to the bypass capacitors. from the capacitors; the DOUT- trace is terminated to a 50R resistor while the DOUT+ trace is going to the connector.

the DOUT+ trace was designed to have 4.37mm total length and 0.4mm width. The recommended impedance of the single ended trace is 50R, but unfortunately, the design was calculated to have roughly 20R. Below points are the ideas behind the design:

  • The system was initially designed to operate ~2W  at 4V input – that’s why the design increase the trace width.
  • To satisfy the 50ohm impedance of the trace, it will be very narrow that the current capacity will suffer.
  • The trace length is minimal enough to not compromise the stability of the link.

The Trace is intended to support 2G and 4G FPDIII Link. Can the design support the application? are the ideas behind the design valid?

Thanks in advance for the reply!

  • 0
    TI__Guru** 108010 points
    Hello Laud,

    I can understand your intention doing this, but :
    1) when using such high frequency signal, any layout mismatch could cause link instability.
    2) Also 4V on the PoC is not recommended at all. We recommend minimum > 8V, to avoid interference pulses created by the changing current load in the image sensor.
    3) To avoid this "low impedance" problem for this short trace, you could remove the ground on the layer below the trace to increase H and so you will increase the impedance of the trace.