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DP83822I: AVD and VDDIO Question

Part Number: DP83822I

Hello,

When using the DP83822I, I would like to run at VDDIO = 1.8V and the LED pins may see voltage up to 3.3V. The ABS MAX for those pins appears to be 3.8V. Is there any problem with this setup?

Could you also please explain what connects to AVD inside of the device and what connects to VDDIO inside of the device? This is not specified in the block diagram but it would be helpful to understand.

Thanks!!

Reed

  • Hi Ethernet Team,

    Could you please comment on the two questions above?

    Thanks,
    Reed
  • Hi Reed,

    The LED pins are in VDDIO domain. When using 1.8V for VDDIO, customer should not use 3.3V on LED. If 3.3V is required on the LED, then a transistor needs to be used such that the LED pin output of the PHY is used to switch ON/OFF the actual LED.

    -Regards
    Aniruddha
  • Hi Aniruddha,

    Thanks for the response. I have ran a few TINA simulations to check out the voltages the device would see in the different scenarios. I have attached the simulation file.

    I have setup the simulation to look like the EVM in LED pullup mode:

    When the simulation shows LED_0 connected to ground, the LED is on and the voltage drop across the diode and series resistor protect the VDDIO level pin:

    When the simulation shows LED_0 connected to VDDIO = 1.8V, the LED is off and the voltage is dropped across the parallel resistor. 

    Is this acceptable? The customer will not want to add in transistors. My hope is that we can provide a solution using a simple solution with resistors to fix the different in VDDIO and the voltage level needed for LED turn on (3.3V supply).

    Thanks,

    Reed

    DP_LED.TSC

  • Hi Reed,

    We have not test this solution for validation. The LED pin has internal pull up resistor connected to the VDDIO rail. There can be a case where it can over stress the pin leading to performance degradation or damage. We would just have to recommend the datasheet approach.

    -Regards
    Aniruddha