DP83867E: 125MHz SGMII clock generation

Abhijit Pethkar41

Part Number: DP83867E

I am using DP83867 ethernet PHY in SGMII mode.

On page 6 pin functions it is mentioned that SGMII_COP/CON clock signal will generate continuous 625MHz clock.
On page 56 of the datasheet PHYCR register has SGMII enable (bit 11) and 125MHz speed enable (bit 4).

I wanted to generate 125MHz from the differential clock from pins SGMII_COP/CON. Which one of the statements is correct?

over 6 years ago

0 Aniruddha Khadye over 6 years ago

TI__Mastermind 18425 points

Hi Abhijit,

The SGMII Clock on SGMII_COP/CON will be fixed at 625MHz. DP83867 does not have the option to generate 125MHz differential clock on SGMII_COP/CON pins.

-Regards
Aniruddha

0 Abhijit Pethkar41 over 6 years ago in reply to Aniruddha Khadye

Intellectual 280 points

Hi Aniruddha,

I am currently referring to snlu209 user guide from TI which has this line on page 3 of the document "The EVM is capable of providing a 125MHz reference clock from an onboard 25MHz crystal". So I am interested to know the register settings that TI has done to get 125MHz on the clock lines.

0 Aniruddha Khadye over 6 years ago in reply to Abhijit Pethkar41

TI__Mastermind 18425 points

Hi Abhijit,

That clock output is single ended and not differential. Are you looking for single ended 125MHz clock output? This can be controlled via register 0x0170. DP83867E does not have the feature to output 125MHz differential clock on the SGMII output clock pins.

-Regards
Aniruddha

0 Abhijit Pethkar41 over 6 years ago in reply to Aniruddha Khadye

Intellectual 280 points

Hi,
The DP83867E is not able to generate 625MHz after SGMII configuration. Can someone guide us as to why the 625MHz is not being generated?

0 Aniruddha Khadye over 6 years ago in reply to Abhijit Pethkar41

TI__Mastermind 18425 points

Hi Abhijit,

When SGMII is enabled on DP83867E, by default it is enabled in 4 wire mode. SGMII 625MHz clock output is available in 6 wire SGMII mode. To enable 6 wire SGMII mode, you have to first enable SGMII mode through strap resistor or register 0x10. Then enable 6 wire SGMII mode via register 0xD3. Can you confirm that 6 wire SGMII mode is enabled?

-Regards
Aniruddha

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DP83867E: 125MHz SGMII clock generation