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DS125DF410: RECEIVER INPUT SPECIFICATION

Part Number: DS125DF410

Hi,

I am trying to understand the meaning of the "RECEIVER INPUTS" specification under section 6.5 of the datasheet.  Normally, the CDR input sensitivity is specified with input signal level, but in this datasheet, the input is specified in Vtx.  Can Ti provide more explanation on how to use this information?  Thank you.

Dobby

  • Hi Dobby,

    This is source transmit level before the transmission media. Normally, you have FPGA or ASIC or other source transmit go through some transmission media then this signal gets connected to the input of the DS125DF410. VTX is FPGA or ASIC transmit level before this transmission media.

    Regards,,nasser

  • Hi Nasser,

    Thank you for the reply. 

    I know that is transmit level from the label.  Why is the Tx level specified at the Receiver input instead a simple sensitivity level?  Also, there is only TX2, TX1, TX0 specified without TX3.  Is the designer try to specify the crosstalk tolerance, or some deeper meaning to these specification?

    Bascially, I am trying to find a senstivity specification for this CDR input with all four channels operating.  Thank you.

    Dobby

  • Hi Dobby,
    Launch amplitude before the media or transmission line is important. If we are out of this range, device on-board receiver equalizer would not be able to correctly equalize and recover the signal.
    Regards,,nasser
  • Hi Dobby,
    I noticed i did not answer 2nd part of your question.
    TX0, TX1, and TX2 actually corresponds to different transmission conditions and this is for every channel(no difference between channels):
    TX0: This specifies launch amplitude for no transmission media
    TX1: 30-inches long FR4 4-mils trace width
    TX2: 40-inches long FR4 4-mils trace width
    Regards,,nasser
  • Hi Nasser,

    I understand that the transmit level with a specific transmission medium argument. That is related to input sensitivity, but not precisely because FR-4 has many variant with different performance and the PCB design has impact on the RF performance.

    I am looking for an receiver input sensitivity specification (i.e. the minimum input level at terminal for a given BER level). I assume that you are not able to provide that information anyway. There is not much point to ask for it anyway, right?

    Please confirm, so I can close this issue. Thank you.

    Dobby
  • Hi Dobby,

    Minimum input sensitivity or minimum level typical level is 70mV peak to peak. This is PRBS31 running at 10.3125G with 1E-12 BER.

    Regards,,nasser
  • Hi Nisser,

    That is all I needed.  Thank you.

    Dobby