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DS110DF111: CDR Bypass and always RAW output setting

Guru 19785 points
Part Number: DS110DF111

Hi Team,

I have related question to the following post.

https://e2e.ti.com/support/interface/f/138/t/557448

Our customer needs to use DS110DF111 in repeater mode (CDR Bypass) since they need to support the data rate which not supported by CDR.

We are proposing the following register settings.

1). REG 0xFF [2] = "1"           //Access Channel Register
2). REG 0x09 [5] = "1"           //Enable Override Output Mux
3). REG 0x1E [7:5] = "000"   //Select RAW data (CDR Bypass)
4). REG 0x0A [3:2] = "11"      //Assert CDR Reset
5). REG 0x0A [3:2] = "00"     //De-assert CDR Reset

We have below questions.

[Q1] What happens if we do not disable "Lock Monitoring", "SBT", "PPM", and "FLD check" functions ?

[Q2] Even when the CDR is bypassed, I believe CDR is still enabled and acquiring lock in background. When the CDR cannot achieve lock, the device normally mutes the output. How can we force output to RAW data even when the CDR is unlocked or bypassed ?

Best Regards,

Kawai

  • Hi Kawai-San,

    Your register settings are correct.

    [Q1]: PPM check , lock monitoring, SBT, and FLD consume power. Especially HEO/VEO lock monitoring since we have to do EOM. So I would expect power consumption could reduce(when disabling these lock qualifiers).
    [Q2]: When reg 0x09[5] is set the user has direct control over the mux settings through reg 0x1E[7:5]. So as long as you have reg 0x09[5] set, the user has total control.

    Regards,,nasser
  • Hi Nasser-san,

    Thanks for your support.

    [Q1] Thank you, I understood.

    [Q2]  I understood that if REG 0x09 [5] = "1", Mux setting is set by REG 0x1E [7:5]. However, I would like to clarify if the output is never muted when the MUX is set to RAW mode, because, CDR should be still enabled and the input signal is also applied to the CDR input. Could you please give us comment in specific ?

    Best Regards,
    Kawai

  • Hi Kawai-San,
    [Q2]: Output is never muted when reg 0x9[5]=1'b and reg 0x1E is set for RAW mode. Under this register settings, the only entity that can disturb RAW mode path is forcing signal detect off.
    Regards,,nasser
  • Hi Nasser-san,

    I am clear now. Thanks for your support!!

    Best Regards,

    Kawai