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Original question:

DP83TC811S-Q1: reference schematic for using RMII interface

DP83TC811S-Q1: RMII Slave vs RMII Master

Bart
Expert 6460 points
Part Number: DP83TC811S-Q1

Team,

can you advise about 2 RMII setups of DP83TC811S-Q1 and as per this document http://www.ti.com/lit/an/snla292/snla292.pdf:

  1. Page 6. RMII Slave.
  1. According to table 3, bootstrap configuration is setup for RMII Slave operation
  2. According to schematic, in this case 50MHz oscillator is used? Is this the clock from the MAC or is it external CMOS oscillator as a physical component?
  • Page 7. RMII Master
    1. According to table 4. , although this is RMII master section, bootstrap configuration description is stating “RMII Slave Operation” I guess this is just typo, as modes in “mode” section are different?
    2. In this configuration 25MHz crystal is used for XI and XO, and 50MHz is outputted on RX_D3, and if my understanding is correct, this is RMII 50MHz CLK signal which should be inputed to i.MX6UL’s ENET1_REF_CLK pin

Thanks for your help.

  • 0
    TI__Expert 5670 points
    Hi Bart,

    - In RMII Slave mode, 50MHz clock is shared between the PHY and the MAC. This clock can be from the MAC or external oscillator.

    - In RMII Master mode, the bootstrap configuration is correct in table 4. The description has typo. In this mode, the 50MHz clock output from RX_D3 pin can be fed into the RMII MAC's reference clock.

    Regards,

    Hung Nguyen