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DP83867E: XI/XO interface model

Part Number: DP83867E


I downloaded the ibis model for DP83867ERGZ. But, the ibis model does not have any information for the 25MHz XI, XO interface. We need to do simulation for this interface in order to convince ourselves that we meet TI spec. Can you help us to get the model for this XI/XO interface?

 

For this interface, I used FC7BACBMI25.0 crystal in series with a R1 = 50 ohm resistor as the XO source termination resistor – see figure below. The 50 ohm can be other value, depending on simulation result. CL1=CL2 = 30pF.

  • Hi Micheal,

    The IBIS model does not support simulation of the XI/XO interface. Looking at the datasheet for FC7BACBMI25.0 and it looks like the load cap values for the crystal is 20pF. As a general rule of thumb, capacitance on each singal pin of crystal should be about twice the load cap value in the datasheet. It would be 40pF in this case. I would recommend changing CL1/CL2 to 36pF each in order to account for parasitic capacitance added by traces and IC package. Series resistance of 50ohms is ok.

    -Regards
    Aniruddha
  • Stray capacitance was assumed = 5pF. So, CL1=CL2 = 2*(20 [for xtal] – 5 [for stray]) = 30 pF. Make sense?

    We think there is a failure mode with this XI/XO interface, that is, the PHY may work at a harmonic of the crystal frequency. How can we model this interface so that we know the PHY will only work at the crystal frequency, not at the harmonic?
  • Hi Micheal,

    Since we are working on this issue over email, I will close this thread for now.

    -Regards
    Aniruddha