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DP83867IS: Can someone help review our hardware design ?

Part Number: DP83867IS

Dear TI team,

Could you please kindly help review our hardware part of ehternet port ? we are using TI DP83867IS. it is working at 100Mps mode and port mirror mode.

Attached picture is part of our hardware design.

Thanks

Best Regards,

Joseph

  • Hi Joseph,

    Since the photograph is of the line driver connections, I will restrict my comments to only this portion. In mirror mode, the polarity of the MDI is also reversed. So pin 11 will become TD_P_A, pin 10 is TD_M_A, Pin 8 is TD_P_B, and pin 7 is TD_M_B. If you wish to operate only in 100M, then disable 1G advertisement through register 0x09 to ensure that the PHY will link either in 100M or 10M.
    The Bob Smith termination on the RJ-45 side is incomplete. the 75ohm resistor network should be connected to Chasis ground via a 1000pF /2kV capacitor.

    -Regards
    Aniruddha
  • Hi Aniruddha

    Got it.

    You mean the interface between MAC and PHY is reversed as well, right ? something likes sgmii signals ?

    Since the hardware designer just leave the pin 1 2 4 5 in the opening state. so I think it is working in mirror mode, am I right ? if i am right, do i need to set related register to make sure phy is in mirror mode ?


    Thanks
    Jophse
  • Dear TI team,

    Can anyone help answer my question above ? Thanks a lot in advance.

    Best Regards,
    Jophse
  • Hi Jopshe,

    In mirror mode, only the MDI channels are reversed. The connection between MAC and PHY does not change in mirror mode. Since 1,2,4,5 are open I think it is reasonable to assume that mirror mode is being used. However, I would recommend confirming it confirming it with the Hardware Engineer that mirror mode is activated by bootstrap. If bootstrap is not used, then mirror mode needs to be activated via software.

    -Regards
    Aniruddha
  • Hi Aniruddha,

    Understood, thanks, Appreciated.

    Jophse