When connected to certain devices our board with a DP83867IRRGZT PHY doesn't auto-negotiate properly. It seems to also be related to the time after power on when the PHY is taken out of reset. Waiting more than 3-4 seconds will appear to fix the issue.
My reset of the phy after power on consists of:
- Asserting low RESET_N pin.
- Starting 125 MHz clock to GTX_CLK
- Wait 1 microsecond (or more)
- De-assert RESET_N pin
- Wait 195 microseconds (or more)
- Software reset by setting bit 15 of BMCR, then waiting for BMCR bit 15 to become zero
I am strapping RX_CTRL to mode 3. Though I see no difference when strapping it to mode 0. Is there a way to verify that the PHY is detecting RX_CTRL strapping to mode 3? I measured the voltage, while the PHY was in reset via RESET_N, at the proper value. Yet it would still be nice to confirm it is truly detected correctly by the phy.
After doing the reset described above, the link status is checked. At first the PHY indicates A/N is enabled, A/N is NOT complete, and link is NOT up. As expected.
After more time passes, the link is checked again. This time the phy indicates auto-negotiation is complete and link is up. Which I expect after enough time has passed for A/N to complete. However, the auto-negotiated speed is 1000 Mbps in register 0 bits 6,13, while it is 10 mbps in register 0x11 bits 15,14. It should be gigiabit. Other bits relating to A/N are also not as I expect, and the link does not work.
Here is a dump of a number of phy registers while it is in this state.
0. (1140) -- PHY control register -- (8000:0000) 0.15 = 0 reset (4000:0000) 0.14 = 0 loopback (2040:0040) 0. 6,13 = b10 speed selection = 1000 Mbps (1000:1000) 0.12 = 1 A/N enable (0800:0000) 0.11 = 0 power-down (0400:0000) 0.10 = 0 isolate (0200:0000) 0. 9 = 0 restart A/N (0100:0100) 0. 8 = 1 duplex = full (0080:0000) 0. 7 = 0 collision test enable (003f:0000) 0. 5- 0 = 0 (reserved) 1. (796d) -- PHY status register -- (8000:0000) 1.15 = 0 100BASE-T4 able (4000:4000) 1.14 = 1 100BASE-X full duplex able (2000:2000) 1.13 = 1 100BASE-X half duplex able (1000:1000) 1.12 = 1 10 Mbps full duplex able (0800:0800) 1.11 = 1 10 Mbps half duplex able (0400:0000) 1.10 = 0 100BASE-T2 full duplex able (0200:0000) 1. 9 = 0 100BASE-T2 half duplex able (0100:0100) 1. 8 = 1 extended status (0080:0000) 1. 7 = 0 (reserved) (0040:0040) 1. 6 = 1 MF preamble suppression (0020:0020) 1. 5 = 1 A/N complete (0010:0000) 1. 4 = 0 remote fault (0008:0008) 1. 3 = 1 A/N able (0004:0004) 1. 2 = 1 link status (0002:0000) 1. 1 = 0 jabber detect (0001:0001) 1. 0 = 1 extended capabilities 4. (01e1) -- Autonegotiation advertisement register -- (8000:0000) 4.15 = 0 next page able (4000:0000) 4.14 = 0 (reserved) (2000:0000) 4.13 = 0 remote fault (1000:0000) 4.12 = 0 (reserved) (0800:0000) 4.11 = 0 asymmetric pause (0400:0000) 4.10 = 0 pause enable (0200:0000) 4. 9 = 0 100BASE-T4 able (0100:0100) 4. 8 = 1 100BASE-TX full duplex able (0080:0080) 4. 7 = 1 100BASE-TX able (0040:0040) 4. 6 = 1 10BASE-T full duplex able (0020:0020) 4. 5 = 1 10BASE-T able (001f:0001) 4. 4- 0 = 1 selector = IEEE 802.3 CSMA/CD 5. (4061) -- Autonegotiation partner abilities register -- (8000:0000) 5.15 = 0 next page able (4000:4000) 5.14 = 1 acknowledge (2000:0000) 5.13 = 0 remote fault (1000:0000) 5.12 = 0 (reserved) (0800:0000) 5.11 = 0 asymmetric pause able (0400:0000) 5.10 = 0 pause able (0200:0000) 5. 9 = 0 100BASE-T4 able (0100:0000) 5. 8 = 0 100BASE-X full duplex able (0080:0000) 5. 7 = 0 100BASE-TX able (0040:0040) 5. 6 = 1 10BASE-T full duplex able (0020:0020) 5. 5 = 1 10BASE-T able (001f:0001) 5. 4- 0 = 1 partner selector = IEEE 802.3 CSMA/CD 9. (0300) -- 1000BASE-T control register -- (e000:0000) 9.15-13 = 0 test mode (1000:0000) 9.12 = 0 manual master/slave enable (0800:0000) 9.11 = 0 manual master/slave value (0400:0000) 9.10 = 0 multi/single port (0200:0200) 9. 9 = 1 1000BASE-T full duplex able (0100:0100) 9. 8 = 1 1000BASE-T half duplex able (0080:0000) 9. 7 = 0 automatic TDR on link down (1fc0:0300) 9. 6 = 12 (reserved) 10. (0000) -- 1000BASE-T status register -- (8000:0000) 10.15 = 0 master/slave config fault (4000:0000) 10.14 = 0 master/slave config result (2000:0000) 10.13 = 0 local receiver status OK (1000:0000) 10.12 = 0 remote receiver status OK (0800:0000) 10.11 = 0 1000BASE-T full duplex able (0400:0000) 10.10 = 0 1000BASE-T half duplex able (0300:0000) 10. 9- 8 = 0 (reserved) (00ff:0000) 10. 7- 0 = 0 1000BASE-T idle error counter 17. (3c00) -- PHYSTS -- (c000:0000) 17.15-14 = 0 speed select = 10 Mbps (2000:2000) 17.13 = 1 duplex mode (1000:1000) 17.12 = 1 page received (0800:0800) 17.11 = 1 speed duplex resolution (0400:0400) 17.10 = 1 link status (0200:0000) 17. 9 = 0 MDI/MDIX C&D line driver (0100:0000) 17. 8 = 0 MDI/MDIX A&B line driver (0080:0000) 17. 7 = 0 speed optimization (0040:0000) 17. 6 = 0 speed mode (0020:0000) 17. 5 = 0 cross wire channel D (0010:0000) 17. 4 = 0 cross wire channel C (0008:0000) 17. 3 = 0 cross wire channel B (0004:0000) 17. 2 = 0 cross wire channel A (0002:0000) 17. 1 = 0 10BASE-Te polarity (0001:0000) 17. 0 = 0 jabber detect 110. (0000) -- Strap configuration status register 1 -- (8000:0000) 110.15 = 0 mirror enable (4000:0000) 110.14 = 0 link downshift enable (2000:0000) 110.13 = 0 clock output disable (1000:0000) 110.12 = 0 RGMII disable (0800:0000) 110.11 = 0 (reserved) (0400:0000) 110.10 = 0 AUTO MDIX disable (0200:0000) 110. 9 = 0 Force MDI/MDIX (0100:0000) 110. 8 = 0 half-duplex enable (0080:0000) 110. 7 = 0 auto-negotiation disable (0040:0000) 110. 6 = 0 (reserved) (0020:0000) 110. 5 = 0 speed sel (0010:0000) 110. 4 = 0 (reserved) (000f:0000) 110. 3- 0 = 0 phy address 111. (0000) -- Strap configuration status register 2 -- (f800:0000) 111.15-11 = 0 (reserved) (0400:0000) 111.10 = 0 flast link detect enable (0380:0000) 111. 9- 7 = 0 (reserved) (0070:0000) 111. 6- 4 = 0 transmit clock skew (0008:0000) 111. 3 = 0 (reserved) (0007:0000) 111. 2- 0 = 0 receive clock skew
