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DS110DF410: How to manually override the CTLE gain (boost) to a fixed value.

Kawai
Guru 19785 points
Part Number: DS110DF410


Hello Team,

Please allow me to confirm whether the procedure in the datasheet is really correct for manual CTLE (fixed EQ boost, no adaptation).

Q1). Is below procedure correct to manually overriding the CTLE boost (gain)  value ?

Q2). What happens if the user followed the datasheet procedure and did not set REG 0x2D [3] = 1 ?  What would be the side effect that could be thought ?

Following description is shown in the datasheet (SNLS397D) page 23.
This describes the procedure how to manually override the CTLE boost setting to a fixed value.

I found one register which may be needed to be set when manually setting the CTLE gain. REG 0x2D [3] seems to be required to be set.

Best Regards,

Kawai

  • 0
    TI__Guru* 93670 points
    Hi Kawai-San,
    I thought I had responded to this earlier.

    Q1). Here is what I use and it works fine. So data sheet recommendation is correct:
    RAW FF 0C FF //broadcast to all channels
    RAW 31 00 60 //force adapt mode 0
    RAW 3A 00 FF //set the desired ctle setting for low rates
    RAW 03 00 FF //set the desired ctle setting
    RAW 13 04 04 //set limitng bit
    RAW 09 20 20 //set output mux override
    RAW 1E 00 E0 //force raw mode. Change from 00 to 50 for retimed mode
    RAW 0A 1C FF //force reset
    RAW 0A 10 FF //release cdr reset

    Q2). Agreed reg 0x2D[3] says EQ boost override but I did not need to use it.

    Regards,,nasser
  • 0 in reply to Nasser Mohammadi
    Guru 19785 points
    Hi Nasser-san,

    Could you please double check to what 0x2D[3] is for and when this bit should be used ?

    If there is no need to set this bit, I would like to request to change this bit to RESERVED in the datasheet to minimize questions from user.

    Best Regards,
    Kawai
  • 0 in reply to Kawai
    TI__Guru* 93670 points
    Hi Kawai-San,
    You can set 0x2D[3] bit as well. For my setup it did not make a difference. For LMH12xx devices we need to set this bit though. To reduce confusion, we can make a note of this in the next revision of the data sheet.
    Regards,,nasser
  • 0 in reply to Nasser Mohammadi
    Guru 19785 points
    Hi Nasser-san,

    Thank you. It would be very much helpful if this bit REG 0x2D[3] description has more detail in the datasheet.

    I understood that there seems no difference between REG 0x2D[3] = "0" or "1" in your test. However, there should be certain meaning for this bit. Would you be able to confirm the specific function for this bit ?

    If this bit is actually ignored for DS110DF410, that would be the best information.

    Best Regards,
    Kawai
  • 0 in reply to Kawai
    TI__Mastermind 43795 points

    Hi Kawai-san,

    The 2D register definition is shown here

    This register is used to override the CTLE input equalization setting.  The equalization setting is written into register 0x03.

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Guru 19785 points
    Hi Lee-san,

    Going back to my first question, if REG 0x2D [3] is required to be set, all the customers who uses in the fixed EQ gain (CLTE) mode are using the wrong register setting, since the datasheet procedure does not describe to set REG 0x02D[3] = "1" in datasheet page 23.

    I want to make sure what is the specific difference of the setting between REG 0x2D[3] = "0" and REG0x2D[3]= "1" in the procedure shown in the datasheet (SNLS397D) page 23.

    So far, we do not hear any issue that EQ gain (boost) had changed, however, we see a problem in the fixed gain condition. We would like to clarify whether this setting may be relating to this problem.

    Best Regards,
    Kawai
  • 0 in reply to Kawai
    TI__Intellectual 870 points
    Hi Kawai,

    I did not use this REG 0x2D[3]bit on the recipe of fixing the CTLE on this device. However i do not know the difference to the device between '1' and '0'.
    Monday is US's public holiday. Please expect response delayed.

    Regarding this, "we see a problem in the fixed gain condition. We would like to clarify whether this setting may be relating to this problem.", if possible, please elaborate to see if we can help.

    Regards
    Liang
  • 0 in reply to Liang Liu1
    Guru 19785 points

    Hi Liang-san,

    It would be helpful if you could allow us to know the specific function for this bit.

    Can we discuss offline about the problem which we are facing ? Please send me email.

    Best Regards,

    Kawai

  • 0 in reply to Kawai
    TI__Intellectual 870 points
    I just sent one email to you a moment ago, with Nasser and Lee copied.
  • 0 in reply to Liang Liu1
    TI__Guru*** 148075 points
    move discussion to email
  • 0 in reply to Liang Liu1
    Guru 19785 points

    Hi,

    Sharing information.

    To manually fix the CTLE boost gain,

    - REG 0x2D [3] = 1 is not required when used in Adaptation Mode = 0.

    - REG 0x2D [3] = 1 is REQUIRED when used in Adaptation Mode = 1,2, or 3.