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DP83848I: How to Configure DP83848I for Ethernet Compliance Testing?

Part Number: DP83848I

Hi there:

The file SNLA239A describes how to configure DP838xx for ethernet compliance testing. The note primarily uses DP83867 as an example, but any DP838xx can use these procedures for compliance
testing. In appendix B, the note describes ethernet compliance testing MDIO register writes for DP83867.

For 100 Base Standard MDI (Test Mode 5):
Reg 0x001F = 0x8000 //reset PHY
Reg 0x0000 = 0x2100 //programs DUT to 100Base-TX Mode
Reg 0x0010 = 0x5008 //programs DUT to Forced MDI Mode
Reg 0x0009 = 0xBB00 //Test Mode 5
Reg 0x0025 = 0x0480 //output test mode to all channels

According to the Table 6-7 Register Map of DP83848I datasheet,  the register 0x0009 and 0x001F is RESERVED, 0x0010=PHY Status Register, and there is no register 0x0025. The register is not same with DP83867.

Is there test mode 5 for DP83848I? Does the reserved register of DP83848I can write? How should I configure DP83848I for ethernet compliance testing correctly and completely?

  • Hi,

    Test mode 5 is scrambled idles for 100Base TX testing. Register 0x1F, 0x09, and 0x25 are not needed to put DP83848I in scrambled idles mode. DP83848I can be made to generate scrambled idles by forcing it in 100Base-TX mode. Use the following settings for DP83848I,

    0x0000 = 0x8100 //Reset
    0x0000 = 0x2100 //Force 100Mbps
    0x0019 bit [15,14] = 00 //Disable Auto-MDIX and force MDI

    For register 0x19, I would recommend first reading the register and then changing only bits 15 and 14. These register settings will output scrambled idles on channel A.

    -Regards
    Aniruddha