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DP83849I: RX_ER_A and B behavior in redundant ethernet connection

Vitaliy Mosesov
Prodigy 110 points
Part Number: DP83849I

Hello.  Looking at the design options with redudant ethernet connection using this IC.  It would probably be per diagram 2.8 in this document:

http://www.ti.com/lit/an/snla086b/snla086b.pdf

I'd like to understand the behavior of the RX_ER_A and RX_ER_B when primary link (A) is broken (cable disconnect) or back up link is broken on Figure 12 (top) in order to properly wire it to the processor MII port that only has single RX_ER signal.  

Thank you.  

  • 0
    TI__Mastermind 18425 points
    Hi Vitaliy,

    Since you plan to use DP83849I for redundant ethernet connection, the MAC will only be connected over a single MII interface. As fas as schematics connections go, you will need to connect only one RX_ER signal. The second MII port should be left unconnected. When the primary link is active, you will receive RX_ER based on the primary link. When primary link is broken, the PHY will switch it over to the back up link. This switch happens internal to the PHY.

    -Regards
    Aniruddha
  • 0 in reply to Aniruddha Khadye
    Prodigy 110 points

    Hi Aniruddha.  Thank you for your reply.  I have searched on the internet for additional information on Flexible MII port assignment function (http://www.ti.com/lit/ds/symlink/dp83849i.pdf) section 5.4.4.3.   If you can point me to more information that will help.

    To clarify, in redundant ethernet channel configuration with DP83849i all of the MII control signals of the back up channel B (i.e. RX_DV_B, RX_ER_B, COL_B, RX_CLK_B, TX_CLK_B etc..) do not need to be connected?   PHY will automatically switch those to primary A channel (via register access) upon link failure detection?

    I'm referring to the redundant connection in section 2.8:

    http://www.ti.com/lit/an/snla086b/snla086b.pdf