Hi team,
We use 953-954 in synchronous clock mode.
I connect the board we made to a PC and perform system verification using Margin Analysis with TI GUI.
When the communication rate was 4 Gbps, there was not much margin, so I set the back channel to 25 Mbps as a trial and tried again to 2 Gbps.
Then, the margin was expanded, but the result was that all PASS was done with the one with the larger strobe position l like a 14, 13 and 12.
I was thinking that both fast and slow strobe positions would fail, so I'm not sure if it's correct that all the slow ones pass.
Is there a register that needs to be changed to perform Margin analysis when the back channel is dropped to 25Mbps and it is set to 2Gbps in the 4 Gbps synchronous clock mode setting?
Best regards,
Tomoaki Yoshida