Hi there,
What is the minimum amount of line capacitance necessary on the VDD pins for stable operation across load? Currently (no pun intended), we have a 10, 1, 0.1, and 0.01uF of different multiples. This seems to be excessive and we were hoping to cut down on the amount to save board space. The datasheet itself seems very general in what it deems absolutely necessary. The chip is being fed from LDO's, so there is minimal ripple. It seems that the decade rule is being used for self-resonance concerns, however it still seems to be a bit much.
Best,
Oscar
