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DS90UB941AS-Q1: What is the differential signal pair required for screen resolution?

Part Number: DS90UB941AS-Q1

Hello,

My company using DS90UB941AS-Q1.for IVI module

Connected display has various screen resolution 1080, 720 and other also.

With 1 LVDS differential pair what is maximum screen resolution?

Best regards,

JaeHoon

  • Hello JaeHoon,

    Important to know that this device supports for a single link a PCLK up to 105MHz.
    You can calculate your required resolution using this formula:

    PCLK = Htot x Vtot x Fps x blanking

  • Thanks for your feedback.

    I made calculation sheet as below. (I don't know actual spec of display)

    Screen
     resolution
    Frame
     rate
    Blanking period
     factor
    H-Res V-Res Blanking period
     factor
    Required
    Pixel clock
    Bits per pixel (color depth) Data Rate Required LVDS pair
    Hz Mhz bpp Gbps
    800x480 60 10% blanking 800 480 1.1 25 24 0.594 1 Pair
    1280x720 60 10% blanking 1280 720 1.1 61 24 1.4256 1 Pair
    1336x768 60 10% blanking 1336 768 1.1 68 24 1.587168 2 Pair
    1329x802 60 10% blanking 1329 802 1.1 70 24 1.648749 2 Pair
    1440x900 60 10% blanking 1440 900 1.1 86 24 2.00475 2 Pair
    1600x900 60 10% blanking 1600 900 1.1 95 24 2.2275 2 Pair
    1680x1050 60 10% blanking 1680 1050 1.1 116 24 2.728688 2 Pair
    1920x720 60 10% blanking 1920 720 1.1 91 24 2.1384 2 Pair
    1920x1080 60 10% blanking 1920 1080 1.1 137 24 3.2076 3 or 4 pair
    1920x1200 60 10% blanking 1920 1200 1.1 152 24 3.564 3 or 4 pair


    1280x720, 60Hz  24bpp will work with 1 LVDS pair.

    From 1336x768 60Hz 24bpp need lat least 2 LVDS pair due to max data rate of lane

    From 1920x1080 60Hz 24bpp need 3 or 4 lane due to max data rate of lane

    If my calculation and assumption is not correct, please let me know it.

     

  • Hello Jaehoon,

    yes this is correct!