• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 33 subscribers
  • Views 292 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/DP83822I: Question about Dp83822i

Marc Liu
Expert 3650 points
Part Number: DP83822I

Tool/software: Code Composer Studio

Hi team,

Customer will use Dp83822i and they have some questions below:

 

  1. What is meaning of the below words from datasheet .  What is the value of this suggested pull down resistor ?

            "The do83822 requires clock to be present at PoR. In case clock is delayed, pull-down on XI is recommended to avoid spurious signal latch-up."

       2.In datasheet , it describes force modes and Advertised Modes. What is the difference between them?

 

        Could you help with the two questions? Looking forward to your reply and thank you!

Marc

  • 0
    TI__Mastermind 18425 points
    Hi Marc,

    If DP83822 is supplied with clock from oscillator or from the MAC and the clock is not present at power up then a 2.2kohm-2.49kohm pull down resistor should be placed on XI pin.

    In force mode, the PHY is forced to operate in a fixed mode for example 100Mbps full duplex. It will only link up with a link partner that supports 100Mbps Full Duplex. In advertised mode, it will advertise all the speeds that it is capable of and then both the DP83822 and Link Partner will settle down for a mode that is supported by both the devices. This process is called auto-negotiation.

    -Regards
    Aniruddha