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DS90UB954-Q1: line concatenation synchronous mode setup issues

Part Number: DS90UB954-Q1
Other Parts Discussed in Thread: ALP

We have 2 x ds90ub953 setup and streaming  1080p30 video into DS90UB954 .  Want to create a larger combined image so have to use line concantenation mode of 954 and the sync has to be setup with the 953 i/o.

In setting up for this we have observed some issues described below.

Set up both DS90UB953 to generate FS at 30ips.  Have isolated the FS signals so that they do not go to the sensors yet and can see 10:90  duty cyle at 30 ips on each GPIO pin2 of each DS90UB953 

When we run the code below  that sets up the FS in ALP the 954 stops streaming out , not sure why ? 

Is it because REG 18 is set to FS enable , at this moment the 954 is setup to be best effort on port 0 , or is it because the VC channels have been defined in this script , do we have to stop the CSI transmitter before 

executing the code below  then restart. 

ALP still shows the RX ports receiving video at this point. 

Once this code runs we cannot get video back streaming again unless we issue a digital reset and  initialise the sensors again but the initialise script for the sensors is

70000 lines of python at present [ 12 minutes to run in ALP! ] 

 

###################################################################
# frame sync is GPIO2 xx1x
# 953A and 953B  setup 
#
###################################################################
board.WriteI2C(UB953A_alias,0x0e,0xf0) # sets all GPIO as outputs on 953A :
board.WriteI2C(UB953A_alias,0x0D,0xF0) # Enable Remote of all 4 GPIOs from DES
board.WriteI2C(UB954,0x6f,0x8A) # BC GPIO Control: Link BC GPIO2 to be Frame Sync output
board.WriteI2C(UB954,0x18,0x01) # FS CTL: Enable Frame Sync and set Internal Frame Sync for Port0 also feeds port1 953
# internal FS and hi/lo register settings used
# set to 0x01 to enable , 0x00 disable
board.WriteI2C(UB953B_alias,0x0e,0xf0) # sets all GPIO as outputs on 953B :
board.WriteI2C(UB953B_alias,0x0D,0xF0) # Enable Remote of all 4 GPIOs from DES
board.WriteI2C (UB954,0x4c,0x12) # RX_PORT 1 read / write
board.WriteI2C(UB954,0x6f,0x8A) # BC GPIO Control: Link BC GPIO2 to be Frame Sync output for port 1 , ie 953B


###### Create an aproximate 30Hz 10% duty cycle square wave for Frame Sync 25MHz BC
# High Time
board.WriteI2C(UB954,0x19,0x0a) # fs high time 1
board.WriteI2C(UB954,0x1A,0xd7) # fs high time 0
# Low Time
board.WriteI2C(UB954,0x1b,0x61) # fs low time 1
board.WriteI2C(UB954,0x1C,0xa0) # fs low time 0

board.WriteI2C (UB954,0x4c,0x01) # RX_PORT 0 read / write

board.WriteI2C (UB954,0x72,0xe8) # assign vc-id 0 to port 0 

board.WriteI2C (UB954,0x4c,0x12) # RX_PORT 1 read / write

board.WriteI2C (UB954,0x72,0xed) # assign vc-id 1 to port 1
board.WriteI2C (UB954,0x4c,0x01) # RX_PORT 0 read / write

 

  • Hello Martin,

    I believe you are correct that the problem is the changing of the VC-IDs while the CSI-2 is already enabled. The VC-IDs should be mapped before the CSI-2 TX transmitter is enabled. Can you try making that change? I don't see any other immediate problems which could cause you to lose CSI-2

    Best Regards,
    Casey
  • Thanks Casey , will try that.

    We actually found that the 953 I/O control should be set as

    board.WriteI2C(UB953A_alias,0x0D,0x41) # Enable Remote of all 4 GPIOs from DES : esnsure bit pattern does not reset AP1302.

    We only needed gpio 2 as a remote for the Frame sync.

    The other pins would reset the Ap1302 if set as 0x0D,0xF0

    So now we have 2 x 30 ips frame syncs aligned.

    I need to now setup line concatenation mode with everything setup before enabling CSI-2 TX