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DP141RLJEVM: DP141RLJEVM 2 lanes support

Oded Asulin
Prodigy 150 points
Part Number: DP141RLJEVM
Other Parts Discussed in Thread: SN65DP141,

Hi,

The sn65dp141 has the capability to disable several of the lanes channels.

However, i have encountered an issue while using a small setup of connecting standard PC to a display (going through the dp141EVM).

1. I have connected standard desktop PC display port output to the DP141RLJEVM input connector via a display port cable.

2. I have connected the DP141RLJEVM output connector to an HP screen via a display port cable.

3. So far, everything works. Screen is displaying the picture (Microsoft windows in my case)

4. i am configuring the EVM for I2C mode (I2C_EN), and using the Advark i2c cable.

5. I disable all the lanes by writing to register 0x1, and disabling all the channels (Data=0x0F). Screen display shut off (no display). As expected

6. I enable all the lanes by writing to register 0x1, and enabling all the channels (Data=0x00). Screen display appears (display is on).  As expected

7. I disable only2 lanes (2, 3) by writing to register 0x1, and disabling all the channels (Data=0x0C). Screen shut off (no display).

8. I disable only 2 lanes (0, 1) by writing to register 0x1, and disabling all the channels (Data=0x03). Screen shut off (no display).

Can anyone explain why step 7 and 8, does not work (no display). Can the display port work with only 2 lanes?

 

Note: 

1. I have repeated the above test with two different screens. Still no display

2. I have lowered the resolution (using the windows screen resolution configuration). Still no display.

 

Thanks,

Oded

 

  • 0
    TI__Guru**** 158951 points
    Oded

    The DP141 is transparent to both the source and the sink, so the source and the sink has no idea that DP141 has disabled lane 2 and 3 and still communicates to each other at 4 lanes. So the overall communication is Source (4 lanes) --- DP141 (2 lanes) --- Sink (4 lanes).

    In order to support 2 lanes, DPCD register at source/sink has to change their max lane count to 2 so the overall communication is Source (2 lanes) --- DP141 (2 lanes) --- Sink (2 lanes).

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 150 points

    Hi David,

    Thanks for your answer.

    I am using a standard "sink" screen and a standard PC as source for the DP.

    I do not want to set anything in the screen, and did not find any option to set it in the PC.

    the display port auxiliary channels is responsible for the communication between the sink and the source, and getting information regarding the LANEs "lock" and training  state and deciding whether to operate in 1, 2 or 4 lanes.

    Does the DP141 somehow provide indication to the sink (screen) that the source is 4 lane capable., even if we have disabled some of it's lanes? 

    I don't think that I as a user should write to the DPCD register? what if I have "poor" cable which has one lane disconnected? will there be no display at all?

    Thanks

    Oded

  • 0 in reply to Oded Asulin
    TI__Guru**** 158951 points

    Oded

    DP141 will not communicate its lane count information to the sink or the source, it is transparent on the DP bus.

    It depends on the source SW implementation to try the 2 lane after 4 lane link training failed or 1 lane after 2 lane link training failed. But if the SW does not support this option, then there will be no display.

    Thanks

    David