TCA9617A: Can SCLB/SDAB be pulled up to a voltage higher than VCCB?

Hey Roy,

My initial thought is we could potentially bias a body diode somewhere. I don't know the answer off the top of my head.

I'll need to put this device on a breakout board and get back to you on this.

Thanks,

-Bobby

Hi Bobby,

Could you please let me know about the test result? Thanks for the help!

Roy Hsu

Roy,

I also wanted to point out that I did test with TCA9617B and found that the B version did not have any leakage current issues like the A version did. If the customer needs to support this kind of configuration, they should be able to use TCA9617B to resolve the issue.

Thanks,

-Bobby

Hi Bobby,

Thanks for the info.! It's good to know TCA9617B works for this application. I'm curious about what makes TCA9617B workable for this application? Which spec makes it different from the TCA9617A?

Besides, the VIH range of this device is 0.7 VCCB to 5.5 V. Let's say VCCB = 3.3 V, then the range would be 2.31 V to 5.5 V. How do we know at which exact voltage will the I/O recognize the input voltage as high?

Thanks!

Roy Hsu

Hey Roy,

"I'm curious about what makes TCA9617B workable for this application? Which spec makes it different from the TCA9617A?"

It's not a spec change. The TCA9617B was a redesign of revision A to fix a powered off high impedance issue. The internal body FETs were fixed such that they don't back bias.

"Besides, the VIH range of this device is 0.7 VCCB to 5.5 V. Let's say VCCB = 3.3 V, then the range would be 2.31 V to 5.5 V. How do we know at which exact voltage will the I/O recognize the input voltage as high?"

Typically what we do is design with margin in mind. I've poked around several internal designs before and see that we use comparator values which are lower than what is spec'd to guarantee the minimum we state in the datasheet. If it says the minimum is 0.7VccB then I can tell you the high signal should be recognized by 2.31V.

-Bobby

Hi Bobby,

Thanks for the response! It's clear to me now.

My customer asked another interesting question and I would like to discuss with you.

Let's say we're designing a system with an I2C connector and a 3.3 V pull-up is implemented. Since we don't know what kind of I2C slave will be interfaced with our system (it may be pulled up to either 3.3 V or 5 V), what would be a good way to design a pull-up circuitry at our end? If the pull-up voltage at the I2C slave is 3.3 V, everything would be fine. However, if it's 5 V then there would be some trouble.

What's your suggestion on this?

Thanks!

Roy Hsu

Hey Roy,

Could you draw me a block diagram of the subsystem, I would like to make sure I completely understand before I provide a suggestion.

Also when making this design, are we able to add discrete components? (MOSFETs, Diodes, ect.)

Thanks,

-Bobby

Hi Bobby,

Here you go.

Thanks!

Roy Hsu

Hey Roy,

With the TCA9617B even if the Master side was 3.3V and the unknown system had a 5V pull up, it would still work. (Not for TCA9617A though)

I also want to double check here, do you need I2C buffering or only I2C level translation? I2C buffering is required if you have a lot of capacitance on your bus. You can assume a max of 10 pF per master/slave on the bus and about 1pF per cm of PCB trace.

If the unknown system also has an unknown capacitance on the i2C buffer then we want to use an I2C buffer. (TCA9617B would be a good approach here) We could also pair up an I2C buffer like TCA9617B with an I2C translator like TCA9406.

What is the Max frequency you need to support?

Thanks,

-Bobby