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SN65DP159: Register setting in power down mode

Masaru Tamai
Prodigy 235 points
Part Number: SN65DP159

Hello.

Can the SN65DP159 register be set in power down mode?

We want to change "HPD_AUTO_PWRDWN_DISABLE (09h bit 2)" to 1 when SN65DP159 is in power down mode.

The OE pin is high and HPD_SNK is low.

The data sheet states that I2C is active.

Best Regards,

  • 0
    TI__Guru*** 144745 points

    since OE pin is high, I2C is still active, but DDC is disabled it's not working as normal mode

  • 0 in reply to Brian Zhou
    Prodigy 235 points

    Hello Brian-san,

    Thank you for your reply.

    We understand that if the OE pin is high, then we can write to the register.

    ・ I thought that "HPD_AUTO_PWRDWN_DISABLE (09h bit 2)" is a register that prevents HPD_SNK from entering power-down mode even if it is LOW. However, according to your explanation, if HPD_SNK is LOW even if 09h bit 2 is set, it will enter power-down mode. How is this register used?

    ・ We think that the register will not be cleared even if it becomes High after writing to the register with HPD_SNK LOW, is it correct? (Except TMDS_CLOCK_RATIO_STATUS bit)

    Best regards,

  • 0 in reply to Masaru Tamai
    TI__Guru*** 144745 points

    It is not cleared by HPD_SNK low.  It is cleared by software or power-on reset.

  • 0 in reply to Brian Zhou
    Prodigy 235 points

    Hello Brian-san,

    thank you for your answer.

    We understood that even if HPD is LOW, the register settings are not cleared.

    We thought that in the power down mode the register settings would be cleared.

    The question has been resolved.

    Best regards,