DS90UB953A-Q1: Acknowledge Response Delay time

Kohsuke Hamasaki

Intellectual 1180 points

Part Number: DS90UB953A-Q1

Hi, Team,

I would like to know the ACK response delay time when pared bellows configuration.

953-954
953-960

*Communicate from MCU on Des side to Ser.

How can we calculate an estimation?

Thanks,

Best regards,

Koh

over 6 years ago

0 Steven(Shenzhen) Shi over 6 years ago

TI__Mastermind 30515 points

Hello Koh,

The I2C's ACK latency from 953 to 954/960 is about dozens of ns level. generally this latency has no special impact on I2C communication. but you should care of: I2C master rate in 954/960 side should match with 953's master I2C rate setting (SCL high and SCL low can be set in 953's register list, pls refer to its d/s).

best regards,

Steven

0 Kohsuke Hamasaki over 6 years ago in reply to Steven(Shenzhen) Shi

TI__Intellectual 1180 points

Hi, Steven,

Thanks for the reply.

I want to know the total Response delay of the Ack that the time is in between Finish MCU output I2C and Receive Ack from 954 when MCU try to communicate with 953.

So that we can just calculate as BCC delay 1.5usec(typ) + FC delay 225nsec(typ)? or we need to think I2C transaction latency also?

Thanks again,

Best regards,

Koh

0 Steven(Shenzhen) Shi over 6 years ago in reply to Kohsuke Hamasaki

TI__Mastermind 30515 points

Koh,

You are right. For ACK the I2C transaction can be ignored. pls see below picture on remote I2C access, you can get the ACK response time, it is short compared with I2C throughput. You also can check 954's d/s page60 (http://www.ti.com/lit/ds/symlink/ds90ub954-Q1.pdf on the I2C time calculation.

rgds,

Steven

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DS90UB953A-Q1: Acknowledge Response Delay time