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TCAN4550: How to retrieve CAN BUS data

Part Number: TCAN4550


Hi Team,

 customer is using CPU (3352) to W/R TCAN4550 and has a general W/R questions.

How is TCAN notify CPU when 1st set of data is arriving and wait for retrieve? Can we know exactly how many set of data is waiting for retrieve?

We already have sample code, but customer wants to understand how it works in general.

Please kindly address in detail  step by step using which flag or pin? Appreciate your support!!

Regards,

Andrew

  • Hey Andrew,

    I've tagged one of our CAN experts to provide comments, you should expect an answer within 24 hours.

    Thanks,

    -Bobby

  • Hi Boddy,

    Thanks, please kindly help, customer is in urgent, thanks!

    Andrew

  • Andrew,

    The best way to do this is through the built-in interrupts on the TCAN4550 device. There is an interrupt located in register 0x1050 bit 19 that sets an interrupt flag when at least one message was received and stored into an RX buffer. In the same register, there are interrupts that get set if the RX FIFO is full, if a new message has been written to the RX FIFO, or if the RX FIFO watermark has been reached (bits 0 through 6 in register 0x1050). These interrupts can be assigned to GPO2 and GPIO1, and if you go to this thread, there are step-by-step instructions on how to do this the fourth post down.

    If the customer does go the route of using the FIFO watermarks, the TX and RX FIFO have to be set correctly in memory (write index, put index, start address, fill level, operation mode) and the watermarks have to be enabled. All these configurations are located in registers 0x10A0, 0x10A4, 0x10B0, 0x10B4, 0x10BC for the RX FIFOs.

    Also, if you email me directly, there is a software guide that goes into detail of how to do these things and get started with sending and receiving CAN messages using the buffers and/or FIFO. I can send this to you.

    Regards,