DS90UB954-Q1: CSI-2 Line count wrong

hello,

if no error is detected, pls check the sensor/isp's FV/LV timing. pls check 954's d/s, when it is linked with 933, it has FV/LV timing request.

////////////////////page41///////////////////////////////  http://www.ti.com/lit/ds/symlink/ds90ub954-q1.pdf /////////////////////////////////

To prevent false detection of FrameValid, FV must be asserted for a minimum number of clocks prior to first
video line to be considered valid. The minimum FrameValid time is programmable in the FV_MIN_TIME register
0xBC. Because the measurement is in FPD-Link III clocks, the minimum FrameValid setup to LineValid timing at
the Serializer will vary based on the RAW input operating mode.
A minimum FV to LV timing is required when processing RAW video frames at the serializer input. If the FV to LV
minimum setup is not met (by default), the first video line is discarded. Optionally, a register control
(PORT_CONFIG:DISCARD_1ST_ON_ERR) forwards the first video line missing some number of pixels at the
start of the line.

regards,

Steven