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DS90UB954-Q1: Minimum I2C fall time

Tomoaki Yoshida91
Genius 5255 points
Part Number: DS90UB954-Q1

Hi team,

I have a question for I2C fall time.

I2C fall time is described in the 953 and 954 data sheets.

The table below is the 954 one.

Although the minimum value is not defined here, do I need to care?

For example, at the time of reception, how fast is the rise and fall permitted?

And is there a possibility that rising and falling during transmission may be faster than the request of the receiving device?

Looking at the NXP data sheet to confirm the I2C specification, Table 9 specified the minimum value of fall time.

https://www.nxp.com/docs/en/user-guide/UM10204.pdf

In other words, I think that the minimum value of fall time should be specified like this.

Best regards,

Tomoaki Yoshida

  • 0
    TI__Genius 12866 points

    We do not spec the min number. 

    The max is more critical. Larger rise and fall time value effectively reduces your i2c frequency.

    Best Regards,

    Charley Cai

  • 0 in reply to Charley Cai
    Genius 5255 points

    Hi Charley-san,

    Thank you for your support.

    I understand that you don't spec the min munber.

    How should we think about the minimum fall time of the I2C specification when using 953,954?

    Will it satisfy this spec without user's special care?

    Or do I need to choise pull-up resistors and, in some cases, add capacitors to meet this requirement?

    Best regards,

    Tomoaki Yoshida

  • 0 in reply to Tomoaki Yoshida91
    TI__Genius 12866 points

    Does the I2C controller talking to 953/954 has the requirement for minimum rise/fall time. 

    If not, no special care is needed.  If yes, then system design consideration need to be taken to meet the I2C controller requirement.

    Best Regards,

    Charley Cai

  • 0 in reply to Charley Cai
    Genius 5255 points

    Hi Charley-san,

    Thank you for your support.

    I will check the requirement of I2C controllers.

    I understood that the minimum fall time SPEC which i attached means I2C device must receiverd correctly at slew rates above this SPEC.

    This SPEC does not define the drive capability of the device because the slew rate is affected by external influences such as pull-up resistance and parasitic capacitance.

    Users need to be careful not to make the fall time less than SPEC.

    Is this recognition correct?

    Best regards,

    Tomoaki Yoshida

  • 0 in reply to Tomoaki Yoshida91
    TI__Genius 12866 points

    This is correct.

    Best Regards,

    Charley Cai