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DS90UB934-Q1: PASS pin relate configuration

Part Number: DS90UB934-Q1

Hi team,

1.Could you please kindly help to point out where can we configure the PORT_PASS_CTL of DS90UB934 ? Since we can't found detail description about this register in datasheet,

2. could you please also kindly help to confirm if the pass pin can be used/configured only under the condition of BIST ?  

Thank you very much for your kindly support.

Best regards

Jessica

  • Jessica,

    1. yes, PASS can be used to monitor the error in both normal or BIST status;

    2. pls check below description on PORT_PASS_CTL. my question: why do you need this function? can you check reg. 0x56/0x55 to monitor the link bit error? also can you use the INT pin to reflect the link bit error?

    best regards,

    Steven

    0x7D PORT_PASS_CTL         Port Pass Control Register yes
        7 RESERVED RW 0   yes
        6:4 RESERVED RW 0 Reserved yes
        3 PASS_PARITY_ERR RW 0 Parity Error Mode
    If this bit is set to 0, the port Pass indication will be deasserted for every parity error detected on the FPD3 Receive interface.  If this bit is set to a 1, the port Pass indication will be cleared on a parity error and remain clear until the PASS_THRESHOLD is met.
    yes
        2 RESERVED RW 0   yes
        1:0 PASS_THRESHOLD RW 0x0 Pass Threshold Register
    This register controls the number of valid frames before asserting the port Pass indication.  If set to 0, PASS will be asserted after Receiver Lock detect.  If non-zero, PASS will be asserted following reception of the programmed number of valid frames.

    yes