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DS90UB913Q-Q1: check weather the data is correct

Part Number: DS90UB913Q-Q1

Hi team,

my customer is using J6/913/914.And meet below questions: 

We checked the frame of camera data in J6, and it shows as the black image, while in normal it will show as captured picture.

So there are  some questions about this phenomenon that:

  1. From camera to TI913: Is there any method rather than make sure that the data from camera to TI913 is correct?
  2. From TI914 to J6: How can we make sure this channel is working well during running time?
  3. For TI914: how can we make sure that there is nothing wrong with TI914 in this situation?

Please share some suggestions with us from the point of view of TI914. Thanks. 

BRs

Given

  • Hello Given,

    there are many thing you can check on the 913A side and on the 914A side.

    Please check LOCK to see that SER and DES are connected.
    Make sure that both SER and DES are setup in the same MODE.
    Make sure you have I2C communications between SER and DES.
    Make sure that your Image sensor is configured correctly and outputting the correct data.
    Make sure that the external Osc is working and supplying the correct clock frequency into the 913A and/ or the Imager.
    Measure INPUT signals into the 913A including HSync, VSync and PCLK.
    1) If an external PCLK from the imager is being used, connect it directly to the scope. If the internal PCLK is being used, connect the probe to the PCLK pin on the SER. For PCLK source configurations, reference the datasheet.
    2) Measure and verify the frequency matches the system specifications.
    3) Measure the VIH and VIL levels and verify they are within the bounds specified in the datasheet.
    4) Measure the rise and fall time of each clock cycle and verify they are within the bounds specified in the datasheet.
    If an external oscillator is being connected directly to the SER, follow Steps 1 through 4 for GPO2 pin.
    Verify that GPO2 is connected to the input PCLK reference pin of the camera sensor unit
    You can use an oscilloscope (in persist mode) and a differential probe to probe the DOUT+ and DOUT- pins of the SER and display the waveform.
    Also measure OUTPUT signals from the 914A including HSync, VSync and PCLK.

  • Hi Hamzeh,

    Thanks for your reply. 

    Except for the hardware measure, is there any software such as Reg can be check? I find there is Reg0x1C in 914 which results is 0x03. 

    Thanks. 

    BRs

    Given

  • To check correct mode and correct IDx:
    -- You need to set register 0x1F[1:0] to choose the required Mode and then you need to check SER reg 0x05[3:2] to verify it is reading the correct Mode from the back channel.
    -- Verify that register SER ID 0x06 reads the correct address which by default is B0(0x58<<1).
    -- Verify that the address in register SER Alias 0x07 matches the address in SER ID 0x06 if there is only one device with this address. This will make things less complicated. If there is more than one device with the address of 0xB0(0x58<<1) then set an alias address in this register to be able to individually call on the device.
    -- Verify that the SER Alias address is different from the default address of its corresponding SER device. The address can be found in register SER Alias 0x07. Each SER needs to have aliases different than their default addresses because by default the device ID for each SER is the same.
    -- Verify that OEN_OSS Override register 0x1F[7] on DES is set to “1” to override the pin select and that 0x1F[6] is set to “1” to configure OEN.

    To check for errors on the link:
    -- Set register 0x03[7:6] to “11” to enable the forward channel parity error checker and the back channel CRC Generator on the DES. Make sure you enable Parity generator and CRC checker on the SER reg 0x03[7:6].
    -- To check the parity errors, read register 0x1A and 0x1B on the DES. If there is a loss of LOCK, then the counters on registers 0x1A and 0x1B are reset. Whenever there is a parity error on the forward channel, the PASS pin will go low. To reset these registers, set register 0x03[1] to “1”.
    To check CRC errors on the back-channel, monitor registers 0x0A and 0x0B on the SER.

    You can also use BIST mode to verify your link between SER and DES is okay and error free. Please refer to 914A d/s page 27.

  • Hello Given,

    Is this issue resolved?

    Thanks,

    Casey