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DS90UB935-Q1: IDX pin resistors

Part Number: DS90UB935-Q1

Hi all,

I'm currently working on a project where we are using the DS90UB935-Q1 serializer.
In this design, we provide a clock signal from the serializer to the sensor.

The CLK_OUT/IDX pin is also used to set the right settings for the I2C addressing of the serializer(used during startup).
We are planning to use the IDX 4 setting of this.


So the goal is to achieve a voltage ratio of 0,676.

As mentioned before this pin is also connected to the sensor, which has a maximum leakage current of 20uA. 

In the datasheet of the serializer, there is mentioned that a minimum load impedance of 35K is required on the CLKOUT pin. 
Does this mean that the minimum pull-down resistor needs to be 35K?

If this is the case, it's not possible to achieve the correct voltage ratio at this pin(due to the 20uA leakage current).

Why is this 35K impedance required?

Thanks,
Stijn


  • Stijin

    yes, in ub935 d/s, a minimum load impedance at the CLK_OUT/IDX pin of 35 kΩ is required when using the CLK_OUT function. it means the total load resistor in this pin (pullup // pulldown) should be >35Kohms when this pin is used to send clock output to sensor. This request is to secure the clock signal quality.

    best regards,

    Steven

  • Hi Steven,

    It looks like this way of configuring the DS8935 I2C bus option did not consider the input leakage current of the clock input of an image sensor. In our application the DS935 is driving the Onsemi AR0144AT. This imager has an input leakage current of 20uA max over temperature. We cannot make a voltage divider >35kO impedance taking into account 20uAmax leakage current. Or do you see a solution?

    Kind regards,
    Stijn

  • Stjin,

    I supposed the leakage current is got when this pin is connected to 1.8V directly, is it correct?

    if yes, to get your target IDX#4, the pull-down equivalent register inside 0114AT is >=90Kohms, yes, the external >35Kohms pulldown register would be impacted by this heavy leaking current in EXTCLK pin, this is not a general use case for LVCMOS input pin.

    From 935 viewpoint, the IDX is latched from strap value when PDB transitions low to HIGH. For the normal operation this pin voltage doesn't impact the IDX value. also for the IDX of UB935, this can be got in UB936's reg. (ser address).

    regards,

    Steven