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DS90UB914A-Q1: Questions about DS90UB914-Q1 BIST function

Jessica Wu74
Expert 6000 points
Part Number: DS90UB914A-Q1
Other Parts Discussed in Thread: DS90UB913A-Q1

Hi team,

Since customer meet some problem when they are using DS90UB913A-Q1 connecting with DS90UB914A-Q1, they found lock sometimes goes down during the transform of video data and now customer can't dismantle mechanical structure. So we want to found out where the problem is happen in the signal chain only by software(camera to 913;913 to 914; 914 to SOC), we have some information need to conform with you, which shows as follow:

#1 if 913A and 914A has pattern generator like 933 and 934 which can help us location the problem

#2 if we can use BIST (configure to internal clock) to see if it is because of pclk not clean, from BIST function described in datasheet i am not very clean if the data sent from 913 to 914 is good data which can be used to see if the 913 and 914 can work well or data with error to see the function of pass pin, could you please help to confirm that?

#3 Except those ways mentioned above, could you please kindly give some suggestions on other ways to help locate the issue?

Thank you very much for your kindly support.

Best regards

Jessica

  • 0
    TI__Mastermind 30515 points

    Jessica,

    pls see below comments:

    #1 if 913A and 914A has pattern generator like 933 and 934 which can help us location the problem

    --> NOT, for new design, ub934 is preferred.

    #2 if we can use BIST (configure to internal clock) to see if it is because of pclk not clean, from BIST function described in datasheet i am not very clean if the data sent from 913 to 914 is good data which can be used to see if the 913 and 914 can work well or data with error to see the function of pass pin, could you please help to confirm that?

    --> yes, but the BIST test condition is should be based on external PCLK. pls check http://www.ti.com/lit/ds/symlink/ds90ub914a-q1.pdf where has BIST setting description.

    #3 Except those ways mentioned above, could you please kindly give some suggestions on other ways to help locate the issue?

    => this is one typical high speed serial link design issue. pls analyze it from the whole high speed serial link viewpoint, including the reff. clocking to ub913a which is required in d/s, power supply noise, PoC network design, connector / cable, etc.

    regards,

    Steven

    best regars,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    TI__Expert 6000 points

    Hi Steven,

    Thank you very much for your kindly support. 

    As to the reply #2, we can see from datasheet  9.4.6 and on table 4, which shows we can also choice to use internal clock, why should we can only use BIST based on external PCLK? Could you please kindly help to explain the reason? Thank you .  

  • 0 in reply to Jessica Wu74
    TI__Mastermind 30515 points

    This is on high speed serial link design tips, to learn FPD-Link this is some common knowledge. some points:

    1. if you just care for the BIST function, yes, it is true that ub934 can support both internal and external clock.

    2. to evaluate the link quality, you need judge the application condition based on internal and external clock:

    a. clock freq. and jitter would impact the link noise margin. so you need set the internal clock freq. >=external lock freq., for internal clock freq., it has some fixed freq. points inside ub934. so firstly you need know the external clock freq., or else if you use the internal clock test, it doesn't give the full information to you. so if you just use the internal clock, it is not accurate to judge the link condition.

    b. for clock you can measure the clock jitter, this is one key factor to inject noise into the serial link. But not only clock impacts the link noise margin, you also need check: connector/cable, power supply noise, etc.

    regards,

    Steven