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DS90UB953-Q1: ToF sensor(CSI-2/D-PHY v1.2) data transfer to MPU(LVCMOS parallel) using DS90UB953-Q1/DS90UB926Q-Q1(FPD-Link III)

Berkay Ozturk
Prodigy 80 points
Part Number: DS90UB953-Q1
Other Parts Discussed in Thread: DS90UB926Q-Q1, , DS90UB934-Q1

Hello,

I have several questions regarding FPD LINK III Serializer/Deserializer IC families. I am planning to use DS90UB953-Q1 as a CSI-2 RX {TX: ToF sensor device is compliant with CSI-2(v 1.2) & D-PHY(v 1.2)} device to receive data. I would like to transfer this serialized data with FPD Link III interface over PCB trace(not planning to use a shielded coax / twisted-pair cable) to a device like DS90UB926Q-Q1 which has a LVCMOS output(output number can be less, thus it can be any device with LVCMOS output with FPD LINK III interface).

Block diagram of my design:

Reference: (Interface)Component(Interface)
Tof(CSI-2 v1.2) ->(CSI-2 v1.3)DS90UB953-Q1(FPD LINK III) <-> (FPD LINK III)DS90UB926Q-Q1(LVCMOS) -> (Parallel CMOS)uProcessor

My questions are:

  1. TX device(ToF sensor) has compatibility with CSI-2(v 1.2) & D-PHY(v 1.2). DS90UB953-Q1 has compatibility with CSI-2(v1.3) & D-PHY(v1.2). I wonder if DS90UB953-Q1 is capable of handling CSI-2 v1.2 communication, which means it has a backward compatibility ?
  2. Will not using a shielded cable for FPD Link III and using a PCB trace(<5cm for example) cause problems , even considering signal & power integrity topics into consideration ? I don' t think it will but all the application notes and datasheets has diagrams with either shielded coax or twisted pair cable. I assume this is just to point that the link is high speed, TX/RX circuits are far apart and needs careful design regarding SI/PI/EMI ?
  3. Will using the FPD LINK III interface between different serializer/deserializer IC families cause any problems ? Are the frames differ between or has special fields regarding serializer/deserializer used or the FPD LINK III frames are universal and can be used with any IC which has this interface ? I would like to be sure that the above block diagram will work.

I apologize if a similar question is already asked, which I couldn' t found, thank you for your time in advance.

Kind Regards.

  • 0
    TI__Guru** 103215 points

    Hello Berkay,

    DS90UB953-Q1 is not compatible to DS90UB926-Q1. We don't have an RGB output deserializer which can pair with a CSi-2 input serializer right now. For parallel CMOS, would DS90UB934-Q1 work? That device could pair with DS90UB953-Q1 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    Prodigy 80 points

    Hello Casey,

    Thank you for the answer. Yes I can use DS90UB934-Q1 since it has 10-bit Bayer data(RAW10) output option. However I now have other questions in mind, which are;

    Overview1: ToF output is RAW12(12-bit data packed like 8-bit, first two 8-bit MSB of pixel data, then two 4-bit LSB pixel data for 2 pixel) and FPD-Link III Forward Channel Transmitter frame format from DS90UB953-Q1 is 40/30-bit long(forward/backward cahnnel), whilst DS90UB934-Q1' s forward channel composed of 28-bits.

    Question1: Is there any diagrams indicating the serial frame format for FPD-Link III ?  Even the channel data is randomized, DC-balanced, and scrambled, so how the recieved data from ToF will seem at the RX gate of the DS90UB934-Q1 ? Will I receive modified data from the serial link or is the link transparent ? Even if so, how is it compatible while frame lengths being different ? Any interrupt mechanism indicating EndofFrame or etc. ?

    Overview2: Let's say that I received the 12-bit data with the FPD-Link III undistorted or unchanged within this 40-bit frame.I would like to output 10-bit Bayer data(RAW10) from DS90UB934-Q1 to MPU.

    Question3: Is it possible to output 10-bit Bayer(RAW10) data from DS90UB934-Q1 while receiving in 12-bit(RAW12) mode from DS90UB953-Q1 ? Or is this IC only deserializes what it receives ?

    Kind Regards,

    Berkay

  • 0 in reply to Berkay Ozturk
    TI__Guru** 103215 points

    Hello Berkay,

    1. When you pair 953 with 934, you must use backwards compatibility mode which is described in this app note: http://www.ti.com/lit/an/snla270a/snla270a.pdf

    In backwards compatibility mode 953 uses 28 bit frames to match 934. The specific frame format is TI IP so we don't typically share it, but as you mentioned, the data is randomized, scrambled, and DC balanced for EMI and to prevent baseband wander. Also it contains clocking bits, plus parity bits for error checking.

    2/3. Our SERDES can not change the data being received from one end to another. We just pass through what is coming in like a pipeline. In this case, if you operate the 953 in RAW12 mode, the 934 will receive RAW12 data packed in the standard RAW12 byte format. How you choose to unpack and use this data is entirely up to you. Indeed you can also simply ignore the lower/upper two bits coming out of the 934 if you don't need those but I'm not sure I understand why you would want to receive RAW10 data from a RAW12 source since you would be losing data. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    Prodigy 80 points

    Hello Casey,

    Thank you for your response and insights. My MPU supports 8-10-16 bit Bayer input format and packs the data in internal memory using DMA. Some of the pins from 16-bit interface is currently in use, so I have to decide on either changing the hardware design to save the resolution or sacrificing some of the bits. The rest would be a software issue I hope.

    Anyway, this will resolve my issue hopefully, I now will spend more time on datasheets and the app note which you provided. Before closing the case, if you could please verify my very first question on backward compatibility with CSI-2 v1.2(being able to receive data from CSI-2 v1.2 device) that would be great and that would be all.

    • TX device(ToF sensor) has compatibility with CSI-2(v 1.2) & D-PHY(v 1.2). DS90UB953-Q1 has compatibility with CSI-2(v1.3) & D-PHY(v1.2). I wonder if DS90UB953-Q1 is capable of handling CSI-2 v1.2 communication, which means it has a backward compatibility ?

    Again, I appreciate your response and time, thank you.

    Kind Regards,

    Berkay

  • 0 in reply to Berkay Ozturk
    TI__Guru** 103215 points

    Hello Berkay,

    In general the CSI-2 and DPHY standards are backwards compatible, so I don't believe you will see any issue with a v1.2 source. You can find the diff document between the two standards on the MIPI website if you are a registered member of the MIPI alliance. 

    Best Regards,

    Casey