TCA9539: Minimizing Icc when driving LED

Hello Bobby and thanks for the answers ,

They realy good I am glad I have asked this question.

Few follow ups below:

"I'm not sure where you got the 12uA value from"

Fig 18 says 5.5uA when Vcc is 0.6V less than Vcc, so approx 6uA ,hence if drop is 1.2V I've just doubled the current .

Is this right?

"With the LED on, you would see the additional 33uA but with it off you would see less than 1uA.(assuming you turn the LED off by setting it to be an Input)"

Getting slightly confused, chapter 9.2.1.2 says :

"when the LED is off, ... The ΔICC parameter in the Electrical Characteristics table shows how ICC increases as VIN becomes lower than VCC "

So what situation is this, when led is off by setting I/O to be input ( then we'd see around 12uA)  or when led is off by driving I/O to be high  ie 3V3?

I take it that when I set I/O to be input is when I see additional 12uA ( actally 11uA) of current?

Thanks

Sebastian

Hey Sebastian,

Glad I could help.

"Fig 18 says 5.5uA when Vcc is 0.6V less than Vcc, so approx 6uA ,hence if drop is 1.2V I've just doubled the current .

Is this right?"

Not exactly.

My understanding of shoot through current is that it does not have a linear relationship like a resistor's I-V curve. Shoot through current is essentially one FET being turned on while another FET is in cut off, so you may see one FET in the linear region while another is in the cut off region. The I-V curve for this looks more like a hill (goes up really steep then slows down quickly and starts to roll off quickly.

This app note discusses shoot through current: (figure 2 shows the IV curve)

http://www.ti.com/lit/an/scba004d/scba004d.pdf

The shoot through current is from a PFET and NFET which is part of our TCA9539's input stage:

The Input Port register's D input (where the blue arrow points) is made up of a NFET and PFET where the gates are tied together. If you have the input pull to Vcc then the NFET is fully turned on and the PFET is fully off so there is very little current that flows from Vcc of the PFET to the NFET into GND. When the input is tied to GND, the PFET is fully on and the NFET is fully off so the same condition occurs. But if you are less than Vcc and larger than GND then both the FETs can slightly conduct which results in larger current draw like the image of that 'hill' I-V curve.

So now that we understand this relationship, we can move forward:

"Getting slightly confused, chapter 9.2.1.2 says :

"when the LED is off, ... The ΔICC parameter in the Electrical Characteristics table shows how ICC increases as VIN becomes lower than VCC " The statement is correct but the reference is a bit wrong, I think this was copy pasted from another datasheet where they list a delta ICC in the electrical characteristics, this datasheet does not have it. 

So what situation is this, when led is off by setting I/O to be input ( then we'd see around 12uA Not linear relationship, it will be larger)  or when led is off by driving I/O to be high  ie 3V3?

I take it that when I set I/O to be input is when I see additional 12uA ( actally 11uA) of current?"

Without the external 100k pull up resistor you would likely see something larger than 12uA. With the external pull up resistor you would see less than 1uA. This assumes you use the "set as input to turn off"

If you set it the output stage to a logic high, you would make the input stage see the stronger pull up from the output stage. There would be loss due to the Rdson of the PFET but it would likely be better than without the external pull up resistor.

Let me know if you still have questions,

-Bobby

Thank you Bobby,

The shoot through current - crystal clear thanks for pointing that, I have not realized that the issue we talking about is the "floating input current".

One thing in your explanation makes me thinking I might take it incorrectly.

I take it that the whole problem when additional current might happend is only related to situation when LED is switched off by setting the pin to input.

When we drive it as logic High:

"If you set it the output stage to a logic high, you would make the input stage see the stronger pull up from the output stage. There would be loss due to the Rdson of the PFET (since input is at logic high it should be the NFET which is on and we would see negligible losses due to Rdson of NFET, but not PFET - what am I missing? ) but it would likely be better than without the external pull up resistor "

Sebastian

Doing schematics , I found one more question :  can the thermal pad of WQFN package be connected to GND , or I need to leave it soldered to thermal pad but electrically floating.

Sorry for the late response!

The thermal pad should be connected to GND. This will help dissipate heat as the GND pad is typically a large plane on PCBs though I would not expect too much power across the device as the pull down resistances should be quite low.

Thanks,

-Bobby

Thanks

I left some questions open in previous (Jul19, 2019 9:58AM) post  as well.

Thanks

Sebastian

Hey Sebastian,

"I take it that the whole problem when additional current might happend is only related to situation when LED is switched off by setting the pin to input.

When we drive it as logic High:

"If you set it the output stage to a logic high, you would make the input stage see the stronger pull up from the output stage. There would be loss due to the Rdson of the PFET (since input is at logic high it should be the NFET which is on and we would see negligible losses due to Rdson of NFET, but not PFET - what am I missing? ) but it would likely be better than without the external pull up resistor "

Yes, the problem does occur when you set the device to an input to disable the pull down FET on the output stage. Typically LED drivers are open drain design so you would either drive low or leave as High-Z but because this device has an input stage tied to the output stage, this problem exists.

Setting the output to HIGH does help but the VoH of the PFET may not bias the output (and input) to Vcc but rather Vcc-VoH. Essentially it would help more than just leaving it floating as a input but an external pull up may help more. Likely though the VoH will be very low since there is technically no load for the PFET to supply a current to so I would suspect the leakage to be very minimal.

-Bobby