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XIO2001: Delay setting from PRST transmission to PCI bus communication start

Part Number: XIO2001

Please tell me how to set the time (delay) from the release of PRST signal to PCI device to the start of PCI bus communication.

Are there any parameters in the EEPROM settings to delay from PRST transmission to PCI bus communication start?

Due to the slow start-up of PCI devices, it takes time from the release of PRST signal to the time when PCI devices become active.

Before PCI devices became Active, PCI bus communication was started, and PCI devices could not respond.

Therefore, we would like to set a delay from PRST signal release to the start of PCI bus communication and start PCI bus communication after PCI device activation (Active state).

If there is no response such as the DVSEL signal at the first communication to the PCI device, do you retry?

If you are retrying, do you know the number of retries and the transmission interval ?