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SN65DP159: Datasheet questions

K.Shidara
Expert 3225 points

Part Number: SN65DP159

Hi Team,

Would you advise below 3 questions of SN65DP159 datasheet rev.F.

Question 1

The DESCRIPTION of Address 0Bh Bit 0 on page 37 of the data sheet has the following description.

"Note: To force TMDS_CLOCK_RATIO_STATUS to 1, this register bit must be set to 1 which will force the 1/40 mode for HDMI 2.0."

TMDS_CLOCK_RATIO_STATUS, that is, when bit 1 of 0Bh goes from 0 to 1, it seems to be written that this bit should be set to 1.

But when I set this bit to 1 at the time of HDMI 2.0, I think that it becomes Disable and can not be used in HDMI 2.0.

Is my interpretation wrong?

Question 2

The DESCRIPTION of Address 0Ah Bit [1: 0] on page 36 of the data sheet has the following description.

"When changing crossover point, need to toggle PD_EN or toggle external HPD_SNK."

If I toggle PD_EN, is that Timing after writing 1 to 0Ah Bit [2] APPLY_RXTX_CHANGES?

This question is concerned with the order because it will be reset at Low 2mS or more than the following description.

0Bh bit1 TMDS_CLOCK_RATIO_STATUS etc.

"This field is reset to the default value whenever HPD_SNK is de-asserted for greater than 2 ms"

Question 3

There is TMDS_OE in Address 20h bit 0 on page 33.

I think this register is accessed from DDC, but is there no register that can be accessed from I2C Control and Status Registers?

Thanks

Best regards,

Shidara

  • 0
    TI__Guru**** 186611 points

    Shidara-san

    1: You can set a '1' to the DDC_TRAIN_DISABLE bit anytime, By default, the TMDS_CLOCK_RATIO_STATUS bit gets updated from the DDC snoop. But you can manually change the TMDS_CLOCK_RATIO_STATUS by writing a '1' to the DDC_TRAIN_DISABLE bit first.

    2. You write to APPLY_RXTX_CHANGE, and then toggle PD_EN or HPD_SNK.

    3. Correct, this is the Adapter ID buffer and accessible through the DDC.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    TI__Expert 3225 points

    Hi David-san

    Thank you very much for your strong support always.

    Would you advise the question to your answer from the customer below?

    ーー

    Thank you for your response.
    There is a part that I am convinced and a part that is not an answer to what I wanted to hear unfortunately.

    1. What I wanted to hear is for what purpose there is a note.
    Question: "Note: To force TMDS_CLOCK_RATIO_STATUS to 1, this register bit must be set to 1 which will force the 1/40 mode for HDMI 2.0."
    What does the above mentioned mean is that if DDC_TRAIN_SET is set to "0" there is a problem so please do not use it?

    2. It is an additional question.
    Question: What happens if you change DEV_FUNC_MODE but do not toggle between PD_EN and HPD_SNK?

    3. Just to make sure, is it correct that I can not access other than DDC?

    ーー

    Thanks

    Best regards,

    Shidara

  • 0 in reply to K.Shidara
    TI__Guru**** 186611 points

    Shidara-san

    1. No. If DDC_TRAINING_SET bit is set to 0, then TMDS_CLOCK_RATIO_STATUS will be automatically set base on DDC read. But if you want to manually change the TMDS_CLOCK_RATIO_STATUS bit, then you need to disable DDC_TRAINING_SET by setting the bit to a '1'. There is nothing wrong with setting the DDC_TRAINING_SET bit to a either '0' or a '1'.

    2. PD_EN or HPD_SNK toggle is needed to confirm that the new setting is activated. If PD_EN or HPD_SNK is not toggled, then new setting is not activated.

    3. You can access DP159 local I2C registers and DDC.

    Thanks

    David