TDP158: the design can not get output from screen.

Lian Wu

Genius 5250 points

Part Number: TDP158

Dears:

Could you kindly help to check the below schematic.

Customer referred the EVM of FPGA, however, the design can not get output from screen.

Pls. kindly give some advice about the design.

Is there any demo code about 4K data?

TDP158RSBT.pdf

over 6 years ago

0 David (ASIC) Liu over 6 years ago

TI__Guru**** 189841 points

Luck

Do they have pullup resistor on SDA_CTL and SCL_CTL, and SDA_SNK and SCL_SNK?

Is the FPGA output DP or DP++?

Are you running 4k@30Hz or 4k@60Hz? What is the clock frequency?

Thanks

David

0 JMMN over 6 years ago in reply to David (ASIC) Liu

TI__Guru 60870 points

Is there any update?

Regards,

JMMN

0 David (ASIC) Liu over 6 years ago in reply to JMMN

TI__Guru**** 189841 points

Luck

I will mark this thread as closed for now, you can re-open this thread by replying to it or creating a new thread.

Thanks

David

0 Lian Wu over 6 years ago in reply to David (ASIC) Liu

Genius 5250 points

Hi David:

Sorry for my delay reply since I was on annual leave last week.

Pls. refer the below information:

1. Do they have pullup resistor on SDA_CTL and SCL_CTL, and SDA_SNK and SCL_SNK?

Luck: Yes they have pull up resistors.

2. Is the FPGA output DP or DP++?

Luck: the FPGA output is DP++.

3. Are you running 4k@30Hz or 4k@60Hz? What is the clock frequency?

Luck: customer runs 4K@60Hz.

Btw, they run 1080p@60Hz is OK.

Pls. give some advice.

0 David (ASIC) Liu over 6 years ago in reply to Lian Wu

TI__Guru**** 189841 points

Luck

Would you please dump out the TDP158 registers?

Thanks

David

0 Brian Zhou over 6 years ago in reply to David (ASIC) Liu

TI__Guru**** 161706 points

Luck:

Do you still need help?

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TDP158: the design can not get output from screen.