Other Parts Discussed in Thread: DP83848-EP
DP83848MPHPEP is the part number we pan to use in RMII mode. Data sheet says 50MHz Ref clock should be connected to CMOS oscillator clock source. What is the input jitter spec of this clock? Data sheet says a 50-MHz 0.005%. What does 0.005% indicate?
Our design has 24 ports, we plan to drive 24 x rmii ref clock from FPGA (Zynq 7Z045). Does TI recommend this scheme? Are you foreseeing any issue?
