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DP83TC811R-Q1: RMII interface not working as expected

Part Number: DP83TC811R-Q1
Other Parts Discussed in Thread: DP83640, DP83TC811

Hi,

We are currently debugging a new design of ours with the DP83TC811R-Q1 PHY.

Our MAC requires it to be strapped to RMII slave mode, and the exact same interface is confirmed to work correctly with both DP83640 and NXP TJA1100.

Other hardware straps are using autonomous mode and 100BASE-T1 Master mode. All straps were verified by reading back the appropriate registers from MDIO.

On the cable side we get a solid link with various other T1 link partners (Marvell, Broadcom, NXP), but the RMII interface is not working as expected. The bus is live but the timing between signals are completely off by several clock cycles. RXDV and RXD0 do not transition high on the same clock cycle, which is expected per the RMII specification.

Below is an exaple of expected behavior using a TJA1100 PHY and measuring RXDV (ch1) and RXDO0 (ch2). Both transition high simultaneously as expected.


The same measurement is repeated below with the DP83TC811R. RXD0 only goes high about 120ns after RXDV. This delay is also inconsistent and jumps between ≈96ns-134ns.

The same delay is consistent with what we notice on captured packets, where the data bits appear somewhat delayed.

Can you suggest where the problem lies and suggested debugging? Do you have a working design with the PHY strapped to RMII slave mode?

Unfortunately our MAC is fixed to RMII master and cannot be changed to any other mode.

Thank you

Luke

  • Hi Luke,

    As per your description, MAC is been used as RMII Master Mode. Kindly confirm, MAC is generating 50MHz Clock and it is connected to XI Pin of Ethernet Phy. Please also check the Clock quality parameters meets the datasheet specifications.

    Regards,
    Geet

  • Hi Geet, 

    Thanks for the reply.

    The MAC is generating a constant 50MHz clock and the clock is connected to the XI pin (XO is floating).

    Below is a capture of the clock (the MAC generates a 3V3 level clock and we have a 33R resistor in series). 

    The clock is swinging quite high and low so we added a resistor divider to lower to the clock to 1V8 level the RXD0 and RXDV signals are acting the same. Below is a capture of the new clock:

    Do you have hardware that uses the DP83TC811R in RMII slave mode? Can you capture the RXD0 and RXDV to confirm that both go high on the same clock cycle?

    Thank you

    Luke 

  • Hi,

    1. Can you please explain Why input clock has swing and can it be made stable ? what is the ppm and jitter of this clock ? Does it matches with datasheet specifictions ? Resistor divider is not recomended as it may slow down the rise/fall time of clock. 

    2. DP83TC811R is media convertor and working over RGMI Interface .You can DP83TC811S EVM to configure to RMII mode. 

    Regards,

    Geet

  • Hi Geet,

    1: The large voltage swing I was seeing was not true to the actual clock signal. This measurement was wrong because I was using a 100MHz oscilloscope to measure a 50MHz clock. The long ground wire also added to this swing. We therefore tested it on a much faster oscilloscope and the clock signal looks good.

    I do not have the ppm and jitter of the clock because it is generated by a FPGA, but the clock is used by 2 other PHYs (TJA1100 and DP83640TVV/NOPB) and it works correctly. 

    We only tested with a resistor divider to see if that made a difference, but we use the standard 3V3 clock by default.

    What voltage level should be used by the XI pin? In the datasheet the High Level Input Voltage is 1.3V, but there is no maximum. Should this be 1.8V or 3.3V?

    2: We understand that the DP83TC811R is working in RGMII mode, but we need to see if it works in RMII mode. We do not have a DP83TC811S EVM to test, so are you able to test it for us in RMII slave mode?

    Thanks

    Luke

  • Hi Luke,

    Keep the swing of Clock similar to VDDIO used for the DP83TC811.

    Regards,

    Geet

  • Hi,

    I am closing this thread. Incase you need further assistance, please open new thread and provide reference to this thread.

    Regards,

    Geet