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SN65C1167: What is the package of SN65C1167NSR?

Part Number: SN65C1167

Datasheet link: SN65C1167EPWR

I am trying to deduce the standard name of the package of this IC.

Fact 1: Page 2 of the datasheet states that the package of this IC is SOP.

Fact 2: There are two packages for this IC; the TSSOP one and "the other one". In page 15, this the other package is named as "PLASTIC SMALL-OUTLINE" (and may be "R-PDSO-G"). This package has a pin pitch of 0.65mm.

Fact 3: The standard SOP package has a pin pitch of 1.27mm.

These three facts conflict with each other. I would like to know the standard name of this package. Please clarify it.


A bonus question:
Why do you clearly name and give mechanical drawing, land pattern and even solder stencil dimensions of TSSOP package, but don't give the same information for this other package? Is there a reason for this discrimination?

Thanks.

  • Hello,

    The devices with an "NS" suffix are in a "small outline" package, which is sometimes abbreviated as SO, SOP, or SOIC.  "NS" is the designator TI gives to this package in linking it to the relevant mechanical drawings that are appended to the datasheet.  The package drawing for this NS package is shown on page 20 of the current version of the SN65C1167 datasheet and shows a pin pitch of 1.27 mm.

    Note that in addition to the SO package ("NS" designator), the device also comes in SSOP ("DB"), TSSOP ("PW"), and PDIP ("N").

    As for why land patterns and example solder paste stencils are defined for only the PW package, I am not sure I can say definitively.  However, my best guess is that these pieces of additional documentation were not typically provided in the past but rather became more common over time.  Since the TSSOP package is more common among "modern" devices, the supporting documentation would be more likely to contain this additional information.

    Please let me know if any of this is still unclear.

    Regards,
    Max