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CCS/DS90UB953A-Q1EVM: DS90UB953/DS90UB954 can't work.

dark hou
Intellectual 940 points
Other Parts Discussed in Thread: ALP

Hi Ti:

We used DS90UB953 and DS90UB954 in our product.

Our cmos sensor is AR0521. MIPI 4 data lines. (800MHz)

Resolution: 1920 x 1080, 60 fps

We can't get any frame from DS90UB954 now.

The line count is always 0. (0x73,0x74 register)

Can you help us for this issue?

DS90UB953:

struct ds90ub954_regval ds90ub953_default_regs[] = {
    {0x0B, 0x13},
    {0x0C, 0x26},
    {0x06, 0x41},
    {0x07, 0x20},
}

DS90UB954:

struct ds90ub954_regval ds90ub954_default_regs[] = {
    {0x1F, 0x02},
    {0x33, 0x03},
    {0x20, 0x20},
    {0x4C, 0x01},
    {0x58, 0x58},
    {0x5C, 0x38},
    {0x5D, 0x60},
    {0x65, 0x80},
    {0x7C, 0xC0},
    {0x70, 0x1E},
    {0x6D, 0x7F},
};

DarkHou

  • 0
    TI__Guru** 103215 points

    Hello Dark,

    We will take a look and respond back shortly. What mode are you using for 954/953? Is it synchronous or non-synchronous?

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    Intellectual 940 points

    Hi Casey:

    953: we use mode 0. (synchronous)

    954: we use mode 3. (RAW10)

    DarkHou

  • 0 in reply to dark hou
    TI__Guru** 103215 points

    Hello DarkHou,

    When connected to a CSI-2 serializer (953), you should use CSI-2 mode on the 954 as well. Please switch 954 to mode 4 for synchronous operation which matches the 953 configuration. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    Intellectual 940 points

    Hi Casey:

    We changed mode to 4 for 954 already.

    We can read line count now.

    But we can't get any frame from 954.

    fail log:

    yavta -n1 -c1 -fSGRBG10 -Fframecapture.raw10 -s1920x1080
    Device /dev/video0 opened: vi-output, ar0521 2-0036 (platform:15700000.vi:0).
    Video format set: width: 1920 height: 1080 buffer size: 4147200
    Video format: BA10 (30314142) 1920x1080
    3 buffers requested.
    length: 4147200 offset: 0
    Buffer 0 mapped at address 0x7fa35b9000.
    length: 4147200 offset: 4149248
    Buffer 1 mapped at address 0x7fa31c4000.
    length: 4147200 offset: 8298496
    Buffer 2 mapped at address 0x7fa2dcf000.
    [  193.471304] start streaming
    [  194.540813] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
    0 (0) [E] 0 4147200 bytes 0.000000 1462513400.034817
    [  195.544877] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
    [  196.548876] tegra-vi4 15700000.vi: ATOMP_FE syncpt timeout!
    [  196.555595] stop streaming
    Captured 0 frames in 0.050555 seconds (0.000000 fps, 82033428.938780 B/s).
    3 buffers released.

    954 Register dump:

    i2cget -f -y 2 0x3D 0x7A
    0x0f
    i2cget -f -y 2 0x3D 0x7B
    0xff
    i2cget -f -y 2 0x3D 0x73
    0x00
    i2cget -f -y 2 0x3D 0x74
    0x02

    DarkHou

  • 0 in reply to dark hou
    TI__Guru** 103215 points

    Hello DarkHou,

    From the register information it seems there is a problem with the CSI-2 data. Please check the CSI-2 error and status registers on the remote 953 device to see if the problem is originating from the imager or from the serializer to deserializer connection. 

    Thanks,

    Casey 

  • 0 in reply to Casey McCrea
    Intellectual 940 points

    Hi Casey:

    We checked 953 error registers.

    There is no CSI error in 953.

    root@tegra-ubuntu:/mnt# i2cget -f -y 2 0x18 0x5C
    0x00
    root@tegra-ubuntu:/mnt# i2cget -f -y 2 0x18 0x5D
    0x00

    I think it should be 954 decoder setting problem.

    Can you help us to review 954 register settings below?

    struct ds90ub954_regval ds90ub954_default_regs[] = {
        {0x1F, 0x02},
        {0x33, 0x03},
        {0x20, 0x20},
        {0x4C, 0x01},
        {0x58, 0x58},
        {0x5C, 0x38},
        {0x5D, 0x60},
        {0x65, 0x80},
        {0x7C, 0xC0},
        {0x70, 0x1E},
        {0x6D, 0x7F},
    };

    DarkHou

  • 0 in reply to dark hou
    TI__Mastermind 30515 points

    Hi,

    As Casey mentioned, if you pair 954 with 953, you need set the mode_sel as CSI mode, the reg. 0x6D is set wrongly. Please set the 0x6D as 0x7C is you are using the coax cable solution.

    when the mode is set correctly, pls check the reg. 0x73/74/75/76 which records the decoded video line count and line length, if these values are not correct, pls check 954's link lock status 0x4c, 4d, 4e, 0x55, 0x56 etc.

    best regards,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Intellectual 940 points

    Hi Steven:

    We modified 0x6D register to 0x7C.

    We can'get frame still.

    The 953 and 954 error register dump is below.

    954 has error on register 0x4d.

    BCC-CRC-ERROR bit is set up.

    How can we fix it?

    The line count and length are wrong too.

    953:

    i2cget -f -y 2 0x18 0x5C
    0x00

    i2cget -f -y 2 0x18 0x5D
    0x00

    954:

    i2cget -f -y 2 0x3D 0x73
    0x00
    i2cget -f -y 2 0x3D 0x74
    0x01
    i2cget -f -y 2 0x3D 0x75
    0xff
    i2cget -f -y 2 0x3D 0x76
    0xff
    i2cget -f -y 2 0x3D 0x4c
    0x01
    i2cget -f -y 2 0x3D 0x4d
    0x30
    i2cget -f -y 2 0x3D 0x4e
    0xe3
    i2cget -f -y 2 0x3D 0x55
    0x00
    i2cget -f -y 2 0x3D 0x56
    0x00

  • 0 in reply to dark hou
    TI__Mastermind 30515 points

    Hi dark,

    From the register reading in your above message, it sounds the link is NOT set correctly.

    you can get the reg. 0x4d/0x4e description in ub954 d/s, the reg. 0x4D = 0x30 and 0x4E = 0xe3 indicate the link is NOT set up correctly.

    please:

    1. pls double confirm the mode-sel is correct or not. you can check 954 d/s page30 on mode setting and its register read at 0x6d.

    2. cable is linked correctly? PCB is not broken? any signals in ub954's high speed FPD-Link input pins?

    3. you can try 953's pattern gen. test in TI's ALP tool, does 954 is locked or not (ox4e/4d)

    regards,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Intellectual 940 points

    Hi Steven:

    We found the problem is below.

    There is no signal for 953 clock out pin.

    We have double checked 953 and 954 mode.

    The mode is correct.

    And 954 refclk has 25Mhz clock by oscilloscope.

    What problem will cause 953 clock out pin has no signal?

    953: (mode 0)

    i2cget -f -y 2 0x18 0x03

    0x48

    954: (mode 4)

    i2cget -f -y 2 0x3D 0x6D

    0x7c

    DarkHou

  • 0 in reply to dark hou
    TI__Mastermind 30515 points

    Dark,

    you can check ub953 d/s on CLK_OUT setting. when you use the internal clock mode, the CLK_OUT would be disabled.

    For your issue, if the setting is correct, pls check the circuit design, is it shorted or not?

    7.4.1.3 Non-Synchronous Internal Mode
    In the Non-Synchronous Internal Clocking mode, the serializer uses the internal Always on Clock (AON) as the
    reference clock for the forward channel. The OSCCLK_SEL select must be asserted 0x05[3]=1, to enable
    maximum data rate when using internal clock mode, and the CLK_OUT function is disabled. A separate
    reference is provided to the image sensor or ISP. When in CSI-2 mode, the CSI-2 interface may be synchronous
    to this clock. The CSI-2 rate must be lower than the line rate. For example, with the internal clock of 24.2 MHz
    the FPD-Link III forward channel rate is 3.872 Gbps, the CSI-2 throughput must be ≤ 3.1 Gbps (See Table 6).

    best regards,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Intellectual 940 points

    Hi Steve:

    We solved no clk out problem for ds90u953.

    We can get 50M Hz for ds90u953 now.

    But ds90u954 can't receive frame still.

    We used 953to954_patgen_YUV_1920x1080p-4Lanes-Working.py to test it first.

    953 gen test pattern for 1920x1080 YUV first.

    954 can get right line length (0x0f00 = 3840)

    But 954 occur CSI error during receiving frame.

    How can we debug for it?

    Register dump for 953:

    root@tegra-ubuntu:~# i2cget -f -y 2 0x18 0x55
    0x00
    root@tegra-ubuntu:~# i2cget -f -y 2 0x18 0x56
    0x00
    root@tegra-ubuntu:~# i2cget -f -y 2 0x18 0x5C
    0x00
    root@tegra-ubuntu:~# i2cget -f -y 2 0x18 0x5D
    0x00

    Register dump for 954:
    root@tegra-ubuntu:~# i2cget -f -y 2 0x3D 0x7A
    0x0f
    root@tegra-ubuntu:~# i2cget -f -y 2 0x3D 0x7B
    0xff
    root@tegra-ubuntu:~# i2cget -f -y 2 0x3D 0x73
    0x00
    root@tegra-ubuntu:~# i2cget -f -y 2 0x3D 0x74
    0x0e
    root@tegra-ubuntu:~# i2cget -f -y 2 0x3D 0x75
    0x0f
    root@tegra-ubuntu:~# i2cget -f -y 2 0x3D 0x76
    0x00
    root@tegra-ubuntu:~# i2cget -f -y 2 0x3D 0x4E
    0xf9

    DarkHou

  • 0 in reply to dark hou
    Intellectual 940 points

    Hi Steve:

    We found 954 RX lock state can't keep on true always.

    How can we solve it?

    954 fail log:
    root@tegra-ubuntu:/home# i2cget -f -y 2 0x3D 0x04
    0xd3
    root@tegra-ubuntu:/home# i2cget -f -y 2 0x3D 0x04
    0xdf
    root@tegra-ubuntu:/home# i2cget -f -y 2 0x3D 0x04
    0xdf
    root@tegra-ubuntu:/home# i2cget -f -y 2 0x3D 0x04
    0xd3
    root@tegra-ubuntu:/home# i2cget -f -y 2 0x3D 0x04
    0xdf

    DarkHou

  • 0 in reply to dark hou
    TI__Mastermind 30515 points

    Dark,

    1. what is the clock mode in your case? if you use the internal AON clock, ub953 would have no clk_out

    2. what is the back channel signal if sync. mode is used? you can measure the ub954's output directly (ub953 is not connected)

    regards,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Intellectual 940 points

    Hi Steve:

    We used sync mode for 953 and 954.

    953:

    mode 0 - CSI2 sync mode

    954:

    mode 4 - CSI2 sync back channel.

    How can we meausre 954 back channel output directly?

    Which pin should we measure?

    ex.

    XOUT?  CMLOUTP? CMLOUTN?

    Darkhou

  • 0 in reply to dark hou
    TI__Mastermind 30515 points

    hi,

    1. pls make sure the power supply is correct in ub953 side

    2. pls make sure the clk_out is isolated by the following device, or else I concern that CLK_OUT is pulled down to GND

    From UB953 side, we don't see no CLK_OUT output in our customers' case, and in our EVM board as well

    regard,

    Steven