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PCA9306: Master channel and device channel

Part Number: PCA9306
Other Parts Discussed in Thread: AM5718,

Hi, I wonder is it a must that SCL1, SDA1 connected to I2C master device, while SCL2, SDA2 connect to slave device?

Our host side is processor AM5718's I2C3 port(3.3V IO) which use LVCMOS buffers to emulate an open drain buffer, the processor stated "I2C emulation is achieved by configuring the LVCMOS buffers to output Hi-Z instead of driving high when transmitting logic-1. ". The I2C bus device side is a SMBUS smart battery(2.5V IO). Please help to confirm if PCA9306 is capable of in this application and the channel connection direction should be?

And is there any concern we can meet the requirement in datasheet "However, if either output is push-pull, data must be unidirectional or the outputs must be 3-state capable and be controlled by some direction-control mechanism to prevent high-to-low contentions in either direction."?

  • Hello,

    The master can be placed on either side of PCA9306.  The important thing is for VREF1 not to be greater than VREF2.  So, in this case connecting the 3.3-V AM5718 master device to SCL2/SDA2 would be the best solution.  It sounds like the output structure of that device in I2C mode is no different from a typical open-drain configuration (i.e., output is either driven low or made high-impedance), so I don't see any issues with interfacing it to PCA9306.  That sentence in the datasheet is saying that you should avoid the case where an IO (for example, from a master) is being driven high at the same time another IO sharing the bus connection (for example, from a slave) is being driven low, since this would result in higher current flow and an undefined bus state.

    Please let us know if you have any further questions.

    Regards,
    Max