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DP83867IR: Clock Delay for GMII

ReedKacz
Expert 3657 points
Part Number: DP83867IR


Hi Ethernet Experts!

The DP83867IR datasheet discusses the RGMII clock delay modes. Is it possible to run the GMII with the clock delay? If not, is there a reason that GMII does not need the clock delay?

Also, for the RGMII delay register, the default bit values of '0' mean that there is no clock delay implemented, correct?

Thanks!
Reed

  • 0
    TI__Mastermind 18425 points

    Hi Reed,

    The RGMII delay control register is not applicable for GMII. GMII standard has delay element baked in the specification itself and is accounted for in the setup/hold time requirements. When a GMII-MAC is connected to GMII-PHY, the signal traces need to be of equal length.

    Do you mean register 0x32[1:0]? Yes, when those bits are '0' the internal RGMII delays will be off.

    -Regards

    Aniruddha