Team,
In section 7.5.10 page 23, there is guidance that bit 7 of register 0x3F should be set to 1 when using the raw data mode to avoid re-triggering a fast cap search.
However, in the register map on page 46, this bit is marked as RESERVED, lightly indicating that that bit should not be configured by the system.
Could you please confirm whether you recommend this bit to be set when using raw data mode?
Thank you very much,